RAM BASED IMPLEMENTATION FOR SCALABLE, RELIABLE HIGH SPEED EVENT COUNTERS
    1.
    发明申请
    RAM BASED IMPLEMENTATION FOR SCALABLE, RELIABLE HIGH SPEED EVENT COUNTERS 失效
    基于RAM的可扩展,可靠的高速事件计数器的实现

    公开(公告)号:US20100027735A1

    公开(公告)日:2010-02-04

    申请号:US12183748

    申请日:2008-07-31

    IPC分类号: H03K21/00

    摘要: There is broadly contemplated herein an arrangement whereby each event source feeds a small dedicated “pre-counter” while an actual count is kept in a 64-bit wide RAM. Such an implementation preferably may involve a state machine that simply sweeps through the pre-counters, in a predetermined fixed order. Preferably, the state machine will access each pre-counter, add the value from the pre-counter to a corresponding RAM location, and then clear the pre-counter. Accordingly, the pre-counters merely have to be wide enough such that even at a maximal event rate, the pre-counter will not be able to wrap (i.e., reach capacity or overflow) before the “sweeper” state machine accesses the pre-counter.

    摘要翻译: 这里广泛考虑了一种布置,其中每个事件源馈送小的专用“预计数器”,而实际计数保持在64位宽的RAM中。 这种实施方式优选地可以包括以预定的固定顺序简单地扫过预先计数器的状态机。 优选地,状态机将访问每个预计数器,将来自预计数器的值添加到相应的RAM位置,然后清除预计数器。 因此,预计数器仅需要足够宽,使得即使在最大事件速率下,在“扫描器”状态机访问预先计数器之前,预计数器将不能包裹(即,达到容量或溢出) 计数器。

    RAM based implementation for scalable, reliable high speed event counters
    2.
    发明授权
    RAM based implementation for scalable, reliable high speed event counters 失效
    基于RAM的实现可扩展,可靠的高速事件计数器

    公开(公告)号:US08660234B2

    公开(公告)日:2014-02-25

    申请号:US12183748

    申请日:2008-07-31

    IPC分类号: H03K21/00

    摘要: There is broadly contemplated herein an arrangement whereby each event source feeds a small dedicated “pre-counter” while an actual count is kept in a 64-bit wide RAM. Such an implementation preferably may involve a state machine that simply sweeps through the pre-counters, in a predetermined fixed order. Preferably, the state machine will access each pre-counter, add the value from the pre-counter to a corresponding RAM location, and then clear the pre-counter. Accordingly, the pre-counters merely have to be wide enough such that even at a maximal event rate, the pre-counter will not be able to wrap (i.e., reach capacity or overflow) before the “sweeper” state machine accesses the pre-counter.

    摘要翻译: 这里广泛考虑了一种布置,其中每个事件源馈送小的专用“预计数器”,而实际计数保持在64位宽的RAM中。 这种实施方式优选地可以包括以预定的固定顺序简单地扫过预先计数器的状态机。 优选地,状态机将访问每个预计数器,将来自预计数器的值添加到相应的RAM位置,然后清除预计数器。 因此,预计数器仅需要足够宽,使得即使在最大事件速率下,在“扫描器”状态机访问预先计数器之前,预计数器将不能包裹(即,达到容量或溢出) 计数器。

    Stalling of DMA operations in order to do memory migration using a migration in progress bit in the translation control entry mechanism
    3.
    发明授权
    Stalling of DMA operations in order to do memory migration using a migration in progress bit in the translation control entry mechanism 有权
    DMA操作停顿,以便在转换控制条目机制中使用正在进行的迁移进行内存迁移

    公开(公告)号:US08621120B2

    公开(公告)日:2013-12-31

    申请号:US11279906

    申请日:2006-04-17

    IPC分类号: G06F13/14

    CPC分类号: G06F13/28 G06F12/1081

    摘要: A mechanism for temporarily stalling selected Direct Memory Access (DMA) operations in a physical input/output (I/O) adapter in order to permit migration of data between physical pages that are subject to access by the physical I/O adapter. When a request for a DMA to a physical page in system memory is received from an I/O adapter, a migration in progress (MIP) bit in a translation control entry (TCE) pointing to the physical page is examined, wherein the MIP bit indicates whether migration of the physical page referenced in the TCE to another location in system memory is currently in progress. If the MIP bit indicates a migration of the physical page is in progress, the DMA from the I/O adapter is temporarily stalled while other DMA operations from other I/O adapters to other physical pages in system memory are allowed to continue.

    摘要翻译: 用于暂时停止物理输入/输出(I / O)适配器中选定的直接内存访问(DMA)操作的机制,以便允许在物理I / O适配器访问的物理页之间迁移数据。 当从I / O适配器接收到对系统存储器中的物理页面的DMA的请求时,检查指向物理页面的翻译控制条目(TCE)中正在进行的迁移(MIP)位,其中MIP位 指示TCE中引用的物理页面迁移到系统内存中的另一个位置是否正在进行中。 如果MIP位指示物理页面的迁移正在进行中,则允许来自I / O适配器的DMA暂时停止,而允许从其他I / O适配器到系统内存中其他物理页面的其他DMA操作继续。

    Credit-based flow control checking and correction system
    5.
    发明授权
    Credit-based flow control checking and correction system 失效
    信用流量控制检查和校正系统

    公开(公告)号:US5825748A

    公开(公告)日:1998-10-20

    申请号:US833636

    申请日:1997-04-08

    IPC分类号: H04L12/56

    摘要: A credit-based flow control checking scheme is presented for controlling data communications in a closed loop system comprising a sender, a receiver and a link coupling the sender and receiver. The credit-based scheme includes automatically periodically transmitting a credit query from the receiver to the sender and upon return receipt of a credit acknowledge containing the available credit count maintained by the sender, determining whether credit gain or credit loss has occurred subsequent to initialization of the closed loop system. Along with automatically determining whether credit gain or credit loss has occurred, a method/system is presented for automatically correcting the loss or gain without requiring resetting of the closed loop system.

    摘要翻译: 提出了一种基于信用的流量控制检查方案,用于控制闭环系统中的数据通信,闭环系统包括发送器,接收器和耦合发送器和接收器的链路。 基于信用的方案包括自动地将信用查询从接收方周期性地发送给发送者,并且在收到包含发送者维护的可用信用计数的信用确认信息时,确定信用收益或信用损失是否在初始化之后发生 闭环系统。 随着自动确定信用收益或信用损失是否发生,提出了一种自动纠正损失或增益的方法/系统,而不需要重置闭环系统。

    COMPUTER-IMPLEMENTED METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR STALLING DMA OPERATIONS DURING MEMORY MIGRATION
    6.
    发明申请
    COMPUTER-IMPLEMENTED METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR STALLING DMA OPERATIONS DURING MEMORY MIGRATION 有权
    计算机实现的方法,设备和计算机程序产品用于在存储器迁移期间进行DMA操作

    公开(公告)号:US20080005383A1

    公开(公告)日:2008-01-03

    申请号:US11420236

    申请日:2006-05-25

    IPC分类号: G06F13/28

    CPC分类号: G06F13/28

    摘要: A computer-implemented method, apparatus, and computer program product are disclosed for migrating data from a source physical page to a destination physical page. A migration process is begun to migrate data from the source physical page to the destination physical page which causes a host bridge to enter a first state. The host bridge then suspends processing of direct memory access operations when the host bridge is in the first state. The data is migrated from the source physical page to the destination physical page while the host bridge is in the first state.

    摘要翻译: 公开了一种用于将数据从源物理页迁移到目的物理页的计算机实现的方法,装置和计算机程序产品。 迁移过程开始将数据从源物理页面迁移到目标物理页面,导致主机桥接器进入第一个状态。 然后,当主桥处于第一状态时,主机桥暂停对直接存储器访问操作的处理。 当主桥处于第一状态时,数据将从源物理页迁移到目标物理页。

    Credit-based flow control checking and correction method
    7.
    发明授权
    Credit-based flow control checking and correction method 失效
    基于信用流量控制检查和校正方法

    公开(公告)号:US6044406A

    公开(公告)日:2000-03-28

    申请号:US835457

    申请日:1997-04-08

    摘要: A credit-based flow control checking scheme is presented for controlling data communications in a closed loop system comprising a sender, a receiver and a link coupling the sender and receiver. The credit-based scheme includes automatically periodically transmitting a credit query from the receiver to the sender and upon return receipt of a credit acknowledge containing the available credit count maintained by the sender, determining whether credit gain or credit loss has occurred subsequent to initialization of the closed loop system. Along with automatically determining whether credit gain or credit loss has occurred, a method/system is presented for automatically correcting the loss or gain without requiring resetting of the closed loop system.

    摘要翻译: 提出了一种基于信用的流量控制检查方案,用于控制闭环系统中的数据通信,该闭环系统包括发送器,接收器和耦合发送器和接收器的链路。 基于信用的方案包括自动地将信用查询从接收方周期性地发送给发送者,并且在收到包含发送者维护的可用信用计数的信用确认信息时,确定信用收益或信用损失是否在初始化之后发生 闭环系统。 随着自动确定信用收益或信用损失是否发生,提出了一种自动纠正损失或增益的方法/系统,而不需要重置闭环系统。