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公开(公告)号:US08116321B2
公开(公告)日:2012-02-14
申请号:US11628807
申请日:2005-06-01
IPC分类号: H04L12/28 , H04L12/56 , H04L5/00 , H04L7/00 , H04J3/06 , G06F1/04 , G06F1/12 , G06F15/16 , G06F13/42 , G06F5/06 , G06F1/08 , H03K5/22 , H03K17/00 , H03L7/00
CPC分类号: G06F1/10
摘要: A router, for routing at least one input signal to at least one output, comprises at least one input module and at least one output module. Each of the input and output modules includes at least one clock selector circuit for selecting from among a first and second clock signal, and an oscillator signal, as a common output clock signal for the at least first router, based in part on whether at least one of the first and second clock signals has toggled. The clock selector circuit provides redundancy as well as distribution of clock signals among elements within each module.
摘要翻译: 用于将至少一个输入信号路由到至少一个输出的路由器包括至少一个输入模块和至少一个输出模块。 每个输入和输出模块包括至少一个用于从第一和第二时钟信号中选择的时钟选择器电路和作为至少第一路由器的公共输出时钟信号的振荡器信号,部分基于至少是否 第一和第二个时钟信号之一已切换。 时钟选择器电路在每个模块内的元件之间提供冗余以及时钟信号的分配。