专利检索 ap:("Ceremorphic, Inc.") AND inv:"Shahabuddin Mohammed" 第 1 页

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发明授权
System and method for flash and RAM allocation for reduced power consumption in a processor 有权

公开(公告)号：US11893249B2

公开(公告)日：2024-02-06

申请号：US17691046

申请日：2022-03-09

申请人： Ceremorphic, Inc.

发明人： Subba Reddy Kallam , Partha Sarathy Murali , Venkata Siva Prasad Pulagam , Anusha Biyyani , Venkatesh Vinjamuri , Shahabuddin Mohammed , Rahul Kumar Gurram , Akhil Soni

IPC分类号： G06F3/06 , G06F12/06

CPC分类号： G06F3/0625 , G06F3/068 , G06F3/0631 , G06F12/0646 , G06F2212/1028

摘要： The present invention is an controller for dynamically allocating RAM between powersave code copied from ROM and transient RAM memory used for storing packets. When the utilization of the transient RAM memory is low, code segments are copied from ROM and executed from RAM using a RAM pointer table which is updated after the code segments are copied over from ROM, and when the utilization of the transient RAM memory is high, code segments are deallocated from RAM and the pointer table is updated to point to the corresponding location in flash ROM.