Vacuum spray head
    1.
    发明授权
    Vacuum spray head 失效
    真空喷头

    公开(公告)号:US4521935A

    公开(公告)日:1985-06-11

    申请号:US527256

    申请日:1983-08-29

    IPC分类号: A47L11/34 E01H1/10

    摘要: A combination vacuum and spray head for a pressurized cleaning apparatus adapted especially for use upon open grating. The structure includes a vacuum head housing, a shielded spray head that provides a plurality of downwardly, diagonally directed spray nozzles for directing a stream of fluid against the opposite sides of parallelly extending grate slats.

    摘要翻译: 用于特别适用于开放光栅的加压清洁设备的组合真空和喷头。 该结构包括真空头壳体,屏蔽喷头,其提供多个向下的对角线指向的喷嘴,用于将流体流引导到平行延伸的格栅板条的相对侧上。

    Digital data processing methods and apparatus for fault detection and
fault tolerance
    2.
    发明授权
    Digital data processing methods and apparatus for fault detection and fault tolerance 失效
    用于故障检测和容错的数字数据处理方法和装置

    公开(公告)号:US5838900A

    公开(公告)日:1998-11-17

    申请号:US759099

    申请日:1996-12-03

    IPC分类号: G06F13/00 G06F11/16 G06F11/00

    CPC分类号: G06F11/1625 G06F11/1633

    摘要: A digital data processing device includes a bus for transmitting signals (e.g., data and/or address information) between plural functional units (e.g., a central processing unit and a peripheral controller). A first such unit includes first and second processing sections that concurrently apply to the bus complementary portions of like information signals (e.g., longwords containing data). A fault detection element reads the resultant signal from the bus and compares it with at least portions of the corresponding signals originally generated by the processing sections themselves. If there is discrepancy, the fault-detector signals a fault, e.g., causing the unit to be taken off-line. By use of a redundant unit, processing can continue for fault-tolerant operation.

    摘要翻译: 数字数据处理装置包括用于在多个功能单元(例如,中央处理单元和外围控制器)之间传送信号(例如,数据和/或地址信息)的总线。 第一这样的单元包括同时应用于类似信息信号的总线互补部分(例如,包含数据的长字)的第一和第二处理部分。 故障检测元件从总线读取合成信号并将其与最初由处理部分本身产生的对应信号的至少部分进行比较。 如果存在差异,则故障检测器发出故障信号,例如使单元离线。 通过使用冗余单元,处理可以继续进行容错操作。

    Method and apparatus for safety testing optical systems for hazardous locations
    3.
    发明授权
    Method and apparatus for safety testing optical systems for hazardous locations 失效
    用于危险场所光学系统安全测试的方法和装置

    公开(公告)号:US06667801B1

    公开(公告)日:2003-12-23

    申请号:US09958977

    申请日:2001-10-12

    IPC分类号: G02B2732

    CPC分类号: G01M11/30 F41A31/00 F42B35/00

    摘要: A method of determining the ignition characteristics of an optical source emitting optical power into a hazardous environment includes providing a chamber and a tapered optical fiber having an input end and an output end, wherein the output end has a smaller diameter than the input end. The output end of the tapered fiber is disposed within the chamber and the input end of the tapered fiber is optically coupled to the optical source for receiving optical power therefrom. Power is first applied to the tapered fiber and the power output at the tapered fiber output end measured. Then a target is applied to the tapered fiber output end, and the chamber is filled with the desired gas/air mixture and the same power applied to the tapered fiber. After power is applied for a period of time, a determination is made whether or not the gas/air mixture ignited.

    摘要翻译: 确定将光功率发射到危险环境中的光源的点火特性的方法包括提供具有输入端和输出端的腔室和锥形光纤,其中输出端具有比输入端小的直径。 锥形光纤的输出端设置在腔室内,并且锥形光纤的输入端光耦合到光源以从其接收光功率。 首先将功率应用于锥形光纤,并测量锥形光纤输出端的功率输出。 然后将目标应用于锥形光纤输出端,并且该腔室填充有所需的气体/空气混合物,并且施加到锥形光纤的相同功率。 在施加一段时间的电力之后,确定气体/空气混合物是否点燃。

    Digital data processing methods and apparatus for fault detection and
fault tolerance
    4.
    发明授权
    Digital data processing methods and apparatus for fault detection and fault tolerance 失效
    用于故障检测和容错的数字数据处理方法和装置

    公开(公告)号:US5630056A

    公开(公告)日:1997-05-13

    申请号:US309210

    申请日:1994-09-20

    IPC分类号: G06F13/00 G06F11/16 G06F11/00

    CPC分类号: G06F11/1625 G06F11/1633

    摘要: A digital data processing device includes a bus for transmitting signals (e.g., data and/or address information) between plural functional units (e.g., a central processing unit and a peripheral controller). A first such unit includes first and second processing sections that concurrently apply to the bus complementary portions of like information signals (e.g., longwords containing data). A fault detection element reads the resultant signal from the bus and compares it with at least portions of the corresponding signals originally generated by the processing sections themselves. If there is discrepancy, the fault-detector signals a fault, e.g., causing the unit to be taken off-line. By use of a redundant unit, processing can continue for fault-tolerant operation.

    摘要翻译: 数字数据处理装置包括用于在多个功能单元(例如,中央处理单元和外围控制器)之间传送信号(例如,数据和/或地址信息)的总线。 第一这样的单元包括同时应用于类似信息信号的总线互补部分(例如,包含数据的长字)的第一和第二处理部分。 故障检测元件从总线读取合成信号并将其与最初由处理部分本身产生的对应信号的至少部分进行比较。 如果存在差异,则故障检测器发出故障信号,例如使单元离线。 通过使用冗余单元,处理可以继续进行容错操作。

    Method and apparatus for validating I/O addresses in a fault-tolerant
computer system
    5.
    发明授权
    Method and apparatus for validating I/O addresses in a fault-tolerant computer system 失效
    验证容错计算机系统中的I / O地址的方法和装置

    公开(公告)号:US5586253A

    公开(公告)日:1996-12-17

    申请号:US356561

    申请日:1994-12-15

    IPC分类号: G06F11/14 G06F11/00

    CPC分类号: G06F11/141

    摘要: A novel mapping and protection circuit arrangement comprises a plurality of checking mechanisms that collectively cooperate to verify the accuracy of I/O addresses generated by input/output (I/O) controllers of a fault-tolerant computer. These verified I/O addresses are translated into system addresses to enable direct memory access (DMA) transactions between the controllers and the computer's host memory. Specifically, certain of the checking mechanisms cooperate to ensure that the DMA accesses are directed to correct pages in host memory, while other checking mechanisms are provided to ensure that memory access operations are performed at correct locations within the page. Additional checking mechanisms are provided to further verify the accuracy of generated I/O addresses.

    摘要翻译: 一种新颖的映射和保护电路装置包括多个检查机制,其共同协作以验证由容错计算机的输入/输出(I / O)控制器产生的I / O地址的精度。 这些验证的I / O地址被转换为系统地址,以便在控制器和计算机的主机存储器之间实现直接内存访问(DMA)事务。 具体来说,某些检查机制协作以确保DMA访问被引导到主机存储器中的正确页面,而提供其他检查机制以确保在页面内的正确位置执行存储器访问操作。 提供额外的检查机制,以进一步验证生成的I / O地址的准确性。