公开(公告)号：US20120025350A1

公开(公告)日：2012-02-02

申请号：US12848531

申请日：2010-08-02

申请人： Kun-Hsien LIN ,  Zi-Ping CHEN ,  Che-Hao CHUANG ,  Ryan Hsin-Chin JIANG

发明人： Kun-Hsien LIN ,  Zi-Ping CHEN ,  Che-Hao CHUANG ,  Ryan Hsin-Chin JIANG

IPC分类号： H01L29/06

CPC分类号： H01L27/0259

摘要： A vertical transient voltage suppressor for protecting an electronic device is disclosed. The vertical transient voltage includes a conductivity type substrate having highly doping concentration; a first type lightly doped region is arranged on the conductivity type substrate, wherein the conductivity type substrate and the first type lightly doped region respectively belong to opposite types; a first type heavily doped region and a second type heavily doped region are arranged in the first type lightly doped region, wherein the first and second type heavily doped regions and the conductivity type substrate belong to same types; and a deep first type heavily doped region is arranged on the conductivity type substrate and neighbors the first type lightly doped region, wherein the deep first type heavily doped region and the first type lightly doped region respectively belong to opposite types, and wherein the deep first type heavily doped region is coupled to the first type heavily doped region.

摘要翻译： 公开了一种用于保护电子设备的垂直瞬态电压抑制器。 垂直瞬变电压包括具有高掺杂浓度的导电型衬底; 导电型衬底上布置有第一类型轻掺杂区域，其中导电类型衬底和第一类型轻掺杂区域分别属于相反类型; 第一类型重掺杂区和第二类重掺杂区布置在第一类型轻掺杂区域中，其中第一和第二类型重掺杂区和导电类型衬底属于相同类型; 并且深度第一类型重掺杂区域布置在导电类型衬底上并且与第一类型轻掺杂区域相邻，其中深第一类型重掺杂区域和第一类型轻掺杂区域分别属于相反类型，并且其中深第一类型重掺杂区域 型重掺杂区域耦合到第一类型重掺杂区域。

公开(公告)号：US20120012974A1

公开(公告)日：2012-01-19

申请号：US12837128

申请日：2010-07-15

申请人： Che-Hao CHUANG ,  Kun-Hsien Lin ,  Ryan Hsin-Chin Jiang

发明人： Che-Hao CHUANG ,  Kun-Hsien Lin ,  Ryan Hsin-Chin Jiang

IPC分类号： H01L29/06

CPC分类号： H01L27/0255

摘要： A lateral transient voltage suppressor for low-voltage applications is disclosed. The suppressor comprises an N-type heavily doped substrate and at least two clamp diode structures horizontally arranged in the N-type heavily doped substrate. Each clamp diode structure further comprises a clamp well arranged in the N-type heavily doped substrate and having a first heavily doped area and a second heavily doped area. The first and second heavily doped areas respectively belong to opposite types. There is a plurality of deep isolation trenches arranged in the N-type heavily doped substrate and having a depth greater than depth of the clamp well. The deep isolation trenches can separate each clamp well. The present invention avoids the huge leakage current to be suitable for low-voltage application.

摘要翻译： 公开了一种用于低电压应用的横向瞬态电压抑制器。 抑制器包括N型重掺杂衬底和水平地布置在N型重掺杂衬底中的至少两个钳位二极管结构。 每个钳位二极管结构还包括在N型重掺杂衬底中布置的具有第一重掺杂区域和第二重掺杂区域的钳位阱。 第一和第二重掺杂区域分别属于相反的类型。 在N型重掺杂衬底中布置有多个深的隔离沟槽，其深度大于夹具阱的深度。 深的隔离沟槽可以很好地分离每个夹具。 本发明避免了巨大的漏电流适合于低电压应用。