PIPELINED ANALOG-TO-DIGITAL CONVERTER AND SUB-CONVERTER STAGE
    1.
    发明申请
    PIPELINED ANALOG-TO-DIGITAL CONVERTER AND SUB-CONVERTER STAGE 有权
    管路模数转换器和分转换器级

    公开(公告)号:US20110285563A1

    公开(公告)日:2011-11-24

    申请号:US12889136

    申请日:2010-09-23

    申请人: Cheng CHEN Jiren YUAN

    发明人: Cheng CHEN Jiren YUAN

    IPC分类号: H03M1/06 H03M1/00 H03M1/12

    摘要: The present invention introduces a sub-converter stage used in a pipelined analog-to-digital converter. The sub-converter stage comprises an amplifier with a gain A, a sub analog-to-digital converter with comparators and a digital unit, a first capacitor with capacitance C, a second capacitor with capacitance C−ΔC, and customized reference signal Vrefk, where Δ   C C = 4 A + 2 and V refk = V ref  ( 1 - Δ   C 2  C ) . If the gain A of the amplifier is adjustable, the sub-converter stage needs an error detector to detect the difference between the output of the amplifier and reference signal Vref and adjust the gain A of the amplifier. The present invention also introduces a pipelined analog-to-digital converter employing the sub-converter stage. In the pipelined analog-to-digital converter and the sub-converter stage presented by this invention, the error generated by the finite gain of amplifier and the error generated by the capacitance mismatch have the same size but opposite sign, ending that the two errors can compensate each other. As a result, the sub-converter stage achieves an error-free conversion and the two errors are calibrated.

    摘要翻译: 本发明引入了用于流水线模数转换器的子转换器级。 子转换器级包括具有增益A的放大器,具有比较器和数字单元的子模数转换器,具有电容C的第一电容器,具有电容C&Dgr的第二电容器C和定制的参考信号 Vrefk,其中&Dgr; C C = 4 A + 2和V refk = V ref(1 - &Dgr; C C C C C)。 如果放大器的增益A可调,则子转换器级需要一个误差检测器来检测放大器的输出和参考信号Vref之间的差值,并调整放大器的增益A. 本发明还引入了采用子转换器级的流水线模数转换器。 在由本发明提出的流水线模数转换器和子转换器级中,由放大器的有限增益产生的误差和由电容失配产生的误差具有相同的尺寸但相反的符号,从而导致两个误差 可以相互补偿 因此,子转换器级实现无错误转换,并校准了两个错误。