Interface circuit for using a low voltage logic tester to test a high voltage IC
    1.
    发明授权
    Interface circuit for using a low voltage logic tester to test a high voltage IC 失效
    使用低电压逻辑测试仪测试高压IC的接口电路

    公开(公告)号:US07383477B2

    公开(公告)日:2008-06-03

    申请号:US11194663

    申请日:2005-08-02

    IPC分类号: G01R31/28

    CPC分类号: G01R31/3163 G01R31/31713

    摘要: The present invention provides an interface circuit for using a low voltage logic tester to test a high voltage IC. The interface circuit is between the high voltage IC and the low voltage logic tester, and is used for converting each output of the high voltage IC to a voltage level that the low voltage logic tester can accept, so as to reduce the cost of the testing.

    摘要翻译: 本发明提供一种使用低电压逻辑测试仪来测试高电压IC的接口电路。 接口电路位于高电压IC和低电压逻辑测试仪之间,用于将高电压IC的每个输出转换为低电压逻辑测试仪可以接受的电压电平,以降低测试成本 。