公开(公告)号：US5585296A

公开(公告)日：1996-12-17

申请号：US599923

申请日：1996-02-12

申请人： Cheng-Hui Chung ,  Yi-Chung Sheng ,  Belle Chia

发明人： Cheng-Hui Chung ,  Yi-Chung Sheng ,  Belle Chia

IPC分类号： H01L21/8246 ,  H01L27/112 ,  H01L21/265

CPC分类号： H01L27/11253 ,  H01L27/112 ,  Y10S438/981

摘要： A method of fabricating memory cells with buried bit lines. In this method, a pad oxide layer is formed on a first conductivity-type silicon substrate. A photoresist layer is formed on the pad oxide layer while exposing predetermined areas of channels. A thick oxide layer is deposited by liquid phase deposition (LPD). The photoresist layer is removed. Second conductivity-type impurities are implanted to form source-drain electrodes using the thick oxide layer as a mask. The thick oxide layer and the pad oxide layer are removed to form bit lines and then word lines are formed crossing the bit lines, whereby the structure with buried bit lines and an array of memory cells is completed.

摘要翻译： 一种制造具有掩埋位线的存储单元的方法。 在该方法中，在第一导电型硅衬底上形成衬垫氧化物层。 在衬垫氧化物层上形成光致抗蚀剂层，同时暴露预定区域的通道。 通过液相沉积（LPD）沉积厚的氧化物层。 去除光致抗蚀剂层。 注入第二导电型杂质以使用厚氧化物层作为掩模形成源 - 漏电极。 去除厚氧化物层和焊盘氧化物层以形成位线，然后形成与位线交叉的字线，由此完成具有掩埋位线和存储器单元阵列的结构。