TWO-STEP STRIPPING METHOD FOR REMOVING VIA PHOTORESIST DURING THE FABRICATION OF PARTIAL-VIA DUAL DAMASCENE FEATURES
    1.
    发明申请
    TWO-STEP STRIPPING METHOD FOR REMOVING VIA PHOTORESIST DURING THE FABRICATION OF PARTIAL-VIA DUAL DAMASCENE FEATURES 审中-公开
    两步法剥离方法,用于通过双组分特征的部分制备过程中的光电离子

    公开(公告)号:US20050239286A1

    公开(公告)日:2005-10-27

    申请号:US10904151

    申请日:2004-10-27

    摘要: A two-step stripping method for removing via photoresist during the fabrication of trench-first partial-via dual damascene features is disclosed. In the first cleaning step, inert gas (He, Ar, N2)/fluorocarbon plasma is used to contact the remaining “Via Photo” for a short time period not exceeding 20 seconds. Thereafter, in the second cleaning step, a reducing plasma is used to completely strip the remaining “Via Photo”, thereby preventing the low-k or ultra low-k carbon-containing dielectric layer from potential carbon depletion.

    摘要翻译: 公开了在制造沟槽首先部分通孔双镶嵌特征期间通过光致抗蚀剂去除的两步剥离方法。 在第一清洗步骤中,使用惰性气体(He,Ar,N 2 N 2)/氟碳等离子体与剩余的“通孔照片”接触不超过20秒的短时间。 此后,在第二清洗步骤中,使用还原等离子体来完全剥离剩余的“通孔照片”,从而防止低k或超低k含碳介质层潜在的碳消耗。

    DAMASCENE PROCESS CAPABLE OF AVOIDING VIA RESIST POISONING
    2.
    发明申请
    DAMASCENE PROCESS CAPABLE OF AVOIDING VIA RESIST POISONING 有权
    通过耐药性消毒可以避免的大豆过程

    公开(公告)号:US20050239285A1

    公开(公告)日:2005-10-27

    申请号:US10709278

    申请日:2004-04-26

    IPC分类号: H01L21/4763 H01L21/768

    CPC分类号: H01L21/76811 H01L21/76813

    摘要: A method for avoiding resist poisoning during a damascene process is disclosed. A semiconductor substrate is provided with a low-k dielectric layer (k≦2.9) thereon, a SiC layer over the low-k dielectric layer, and a blocking layer over the SiC layer. The blocking layer is used to prevent unpolymerized precursors diffused out from the low-k dielectric layer from contacting an overlying resist. A bottom anti-reflection coating (BARC) layer is formed on the blocking layer. A resist layer is formed on the BARC layer, the resist layer having an opening to expose a portion of the BARC layer. A damascene structure is formed in the low-k dielectric layer by etching the BARC layer, the blocking layer, the SiC layer, and the low-k dielectric layer through the opening.

    摘要翻译: 公开了一种在大马士革过程中避免抗蚀剂中毒的方法。 在半导体衬底上设置有低k电介质层(k <= 2.9),在低k电介质层上的SiC层和在SiC层上的阻挡层。 阻挡层用于防止从低k电介质层扩散的未聚合的前体与上覆抗蚀剂接触。 在阻挡层上形成底部防反射涂层(BARC)层。 在BARC层上形成抗蚀剂层,抗蚀剂层具有露出BARC层的一部分的开口。 通过开口蚀刻BARC层,阻挡层,SiC层和低k电介质层,在低k电介质层中形成镶嵌结构。

    Damascene process capable of avoiding via resist poisoning
    3.
    发明授权
    Damascene process capable of avoiding via resist poisoning 有权
    大马士革过程能够避免通过抗蚀剂中毒

    公开(公告)号:US07135400B2

    公开(公告)日:2006-11-14

    申请号:US10709278

    申请日:2004-04-26

    IPC分类号: H01L21/4763

    CPC分类号: H01L21/76811 H01L21/76813

    摘要: A method for avoiding resist poisoning during a damascene process is disclosed. A semiconductor substrate is provided with a low-k dielectric layer (k≦2.9) thereon, a SiC layer over the low-k dielectric layer, and a blocking layer over the SiC layer. The blocking layer is used to prevent unpolymerized precursors diffused out from the low-k dielectric layer from contacting an overlying resist. A bottom anti-reflection coating (BARC) layer is formed on the blocking layer. A resist layer is formed on the BARC layer, the resist layer having an opening to expose a portion of the BARC layer. A damascene structure is formed in the low-k dielectric layer by etching the BARC layer, the blocking layer, the SiC layer, and the low-k dielectric layer through the opening.

    摘要翻译: 公开了一种在大马士革过程中避免抗蚀剂中毒的方法。 在半导体衬底上设置有低k电介质层(k <= 2.9),在低k电介质层上的SiC层和在SiC层上的阻挡层。 阻挡层用于防止从低k电介质层扩散的未聚合的前体与上覆抗蚀剂接触。 在阻挡层上形成底部防反射涂层(BARC)层。 在BARC层上形成抗蚀剂层,抗蚀剂层具有露出BARC层的一部分的开口。 通过开口蚀刻BARC层,阻挡层,SiC层和低k电介质层,在低k电介质层中形成镶嵌结构。