公开(公告)号：US07683427B2

公开(公告)日：2010-03-23

申请号：US11857437

申请日：2007-09-18

申请人： Chin-Lung Chen ,  Wen-Kuo Li

发明人： Chin-Lung Chen ,  Wen-Kuo Li

IPC分类号： H01L29/76

CPC分类号： H01L29/7816 ,  H01L29/42368 ,  H01L29/66681 ,  H01L29/66689

摘要： A laterally diffused metal-oxide-semiconductor (LDMOS) device as well as a method of making the same is disclosed. A gate is formed on a semiconductor substrate between a source region and a drain region with one side laterally extending onto a part of a field oxide layer and the opposite side beside the source region. A gate dielectric layer is formed between the gate and the semiconductor substrate, wherein the gate dielectric layer comprises two or more portions having different thicknesses arranged laterally in a way that the thicknesses of the portions gradually increase from one side beside the source doping region to the opposite side bordering the field oxide layer. With such structure, the hot carrier impact is minimized and the gate length can be scaled down to gain Idlin.

摘要翻译： 公开了横向扩散的金属氧化物半导体（LDMOS）器件及其制造方法。 栅极形成在源极区域和漏极区域之间的半导体衬底上，其一侧横向延伸到场氧化物层的一部分和源极区域旁边的相对侧。 在栅极和半导体衬底之间形成栅极电介质层，其中栅极电介质层包括具有不同厚度的两个或更多个部分，其侧向排列成使得部分的厚度从源极掺杂区域旁边的一侧逐渐增加到 与场氧化物层接壤的相对侧。 利用这种结构，热载体的冲击被最小化，并且可以缩小栅极长度以获得Idlin。

公开(公告)号：US20090184368A1

公开(公告)日：2009-07-23

申请号：US12018638

申请日：2008-01-23

申请人： Chin-Hung Liu ,  Chin-Lung Chen ,  Ming-Tsung Tung ,  Wen-Kuo Li

发明人： Chin-Hung Liu ,  Chin-Lung Chen ,  Ming-Tsung Tung ,  Wen-Kuo Li

IPC分类号： H01L29/78

CPC分类号： H01L27/088 ,  H01L21/823418 ,  H01L27/0207 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/086 ,  H01L29/0878 ,  H01L29/4238 ,  H01L29/7816

摘要： An IC chip, including a switch LDMOS device and an analog LDMOS device, is configured on a substrate having a first conductive type. Components of the two LDMOS devices respectively include two gate conductive layers configured on two first active regions of the substrate. A common source contact region having a second conductive type is configured in a second active region, which is configured between the two first active regions. An isolation structure is included for isolating the second active region and the first active regions. The isolation structure between the first active regions and the second active region has a length “A” extending along a longitudinal direction of a channel under each gate conductive layer, and each gate conductive layer on each first active region has a length “L” extending along the longitudinal direction of the channel, the two LDMOS devices have different A/L values.

摘要翻译： 包括开关LDMOS器件和模拟LDMOS器件的IC芯片配置在具有第一导电类型的衬底上。 两个LDMOS器件的组件分别包括配置在衬底的两个第一有源区上的两个栅极导电层。 具有第二导电类型的公共源极接触区域被配置在第二有源区域中，第二有源区域被配置在两个第一有源区域之间。 包括用于隔离第二有源区和第一有源区的隔离结构。 第一有源区和第二有源区之间的隔离结构具有沿着每个栅极导电层下方的沟道的纵向方向延伸的长度“A”，并且每个第一有源区上的每个栅极导电层具有长度“L” 沿着通道的纵向方向，两个LDMOS器件具有不同的A / L值。

公开(公告)号：US07560774B1

公开(公告)日：2009-07-14

申请号：US12018638

申请日：2008-01-23

申请人： Chin-Hung Liu ,  Chin-Lung Chen ,  Ming-Tsung Tung ,  Wen-Kuo Li

发明人： Chin-Hung Liu ,  Chin-Lung Chen ,  Ming-Tsung Tung ,  Wen-Kuo Li

IPC分类号： H01L29/76

CPC分类号： H01L27/088 ,  H01L21/823418 ,  H01L27/0207 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/086 ,  H01L29/0878 ,  H01L29/4238 ,  H01L29/7816

摘要： An IC chip, including a switch LDMOS device and an analog LDMOS device, is configured on a substrate having a first conductive type. Components of the two LDMOS devices respectively include two gate conductive layers configured on two first active regions of the substrate. A common source contact region having a second conductive type is configured in a second active region, which is configured between the two first active regions. An isolation structure is included for isolating the second active region and the first active regions. The isolation structure between the first active regions and the second active region has a length “A” extending along a longitudinal direction of a channel under each gate conductive layer, and each gate conductive layer on each first active region has a length “L” extending along the longitudinal direction of the channel, the two LDMOS devices have different A/L values.

摘要翻译： 包括开关LDMOS器件和模拟LDMOS器件的IC芯片配置在具有第一导电类型的衬底上。 两个LDMOS器件的组件分别包括配置在衬底的两个第一有源区上的两个栅极导电层。 具有第二导电类型的公共源极接触区域被配置在第二有源区域中，第二有源区域被配置在两个第一有源区域之间。 包括用于隔离第二有源区和第一有源区的隔离结构。 第一有源区和第二有源区之间的隔离结构具有沿着每个栅极导电层下方的沟道的纵向方向延伸的长度“A”，并且每个第一有源区上的每个栅极导电层具有长度“L” 沿着通道的纵向方向，两个LDMOS器件具有不同的A / L值。

公开(公告)号：US20090072308A1

公开(公告)日：2009-03-19

申请号：US11857437

申请日：2007-09-18

申请人： Chin-Lung Chen ,  Wen-Kuo Li

发明人： Chin-Lung Chen ,  Wen-Kuo Li

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7816 ,  H01L29/42368 ,  H01L29/66681 ,  H01L29/66689

摘要： A laterally diffused metal-oxide-semiconductor (LDMOS) device as well as a method of making the same is disclosed. A gate is formed on a semiconductor substrate between a source region and a drain region with one side laterally extending onto a part of a field oxide layer and the opposite side beside the source region. A gate dielectric layer is formed between the gate and the semiconductor substrate, wherein the gate dielectric layer comprises two or more portions having different thicknesses arranged laterally in a way that the thicknesses of the portions gradually increase from one side beside the source doping region to the opposite side bordering the field oxide layer. With such structure, the hot carrier impact is minimized and the gate length can be scaled down to gain Idlin.

摘要翻译： 公开了横向扩散的金属氧化物半导体（LDMOS）器件及其制造方法。 栅极形成在源极区域和漏极区域之间的半导体衬底上，其一侧横向延伸到场氧化物层的一部分和源极区域旁边的相对侧。 在栅极和半导体衬底之间形成栅极电介质层，其中栅极电介质层包括具有不同厚度的两个或更多个部分，其侧向排列成使得部分的厚度从源极掺杂区域旁边的一侧逐渐增加到 与场氧化物层接壤的相对侧。 利用这种结构，热载体的冲击被最小化，并且可以缩小栅极长度以获得Idlin。