公开(公告)号：US06988259B2

公开(公告)日：2006-01-17

申请号：US10327454

申请日：2002-12-20

申请人： Christophe Pierrat ,  You-Ping Zhang ,  Fang-Cheng Chang ,  Hoyong Park ,  Yao-Ting Wang

发明人： Christophe Pierrat ,  You-Ping Zhang ,  Fang-Cheng Chang ,  Hoyong Park ,  Yao-Ting Wang

IPC分类号： G06F17/50 ,  G03F1/00

CPC分类号： G03F1/70 ,  G03F1/36 ,  G06F17/5068

摘要： A semiconductor layout testing and correction system is disclosed. The system combines both rule-based optical proximity correction and model-based optical proximity correction in order to test and correct semiconductor layouts. In a first embodiment, a semiconductor layout is first processed by a rule-based optical proximity correction system and then subsequently processed by a model-based optical proximity correction system. In another embodiment, the system first processes a semiconductor layout with a rule-based optical proximity correction system and then selectively processes difficult features using a model-based optical proximity correction system. In yet another embodiment, the system selectively processes the various features of a semiconductor layout using a rule-based optical proximity correction system or a model-based optical proximity correction system.

公开(公告)号：US06584609B1

公开(公告)日：2003-06-24

申请号：US09514551

申请日：2000-02-28

申请人： Christophe Pierrat ,  You-Ping Zhang ,  Fang-Cheng Chang ,  Hoyong Park ,  Yao-Ting Wang

发明人： Christophe Pierrat ,  You-Ping Zhang ,  Fang-Cheng Chang ,  Hoyong Park ,  Yao-Ting Wang

IPC分类号： G06F1750

CPC分类号： G03F1/70 ,  G03F1/36 ,  G06F17/5068

摘要： A semiconductor layout testing and correction system is disclosed. The system combines both rule-based optical proximity correction and model-based optical proximity correction in order to test and correct semiconductor layouts. In a first embodiment, a semiconductor layout is first processed by a rule-based optical proximity correction system and then subsequently processed by a model-based optical proximity correction system. In another embodiment, the system first processes a semiconductor layout with a rule-based optical proximity correction system and then selectively processes difficult features using a model-based optical proximity correction system. In yet another embodiment, the system selectively processes the various features of a semiconductor layout using a rule-based optical proximity correction system or a model-based optical proximity correction system.

摘要翻译： 公开了一种半导体布局测试和校正系统。 该系统结合基于规则的光学邻近校正和基于模型的光学邻近校正，以便测试和校正半导体布局。 在第一实施例中，半导体布局首先由基于规则的光学邻近校正系统处理，然后由基于模型的光学邻近校正系统进行处理。 在另一个实施例中，系统首先使用基于规则的光学邻近校正系统处理半导体布局，然后使用基于模型的光学邻近校正系统来选择性地处理困难的特征。 在另一个实施例中，系统使用基于规则的光学邻近校正系统或基于模型的光学邻近校正系统选择性地处理半导体布局的各种特征。