公开(公告)号：US10319702B2

公开(公告)日：2019-06-11

申请号：US15860730

申请日：2018-01-03

申请人： Chul Park ,  Seonggwan Lee ,  Minkyeong Park

发明人： Chul Park ,  Seonggwan Lee ,  Minkyeong Park

IPC分类号： H01L25/04 ,  H01L25/07 ,  H01L25/11 ,  H01L25/075 ,  H01L25/065

摘要： A semiconductor package includes a substrate including a signal pattern on an upper surface thereof, a chip stack on the substrate, and a first semiconductor chip and one or more spacers between the substrate and the chip stack. The chip stack includes one or more second semiconductor chips stacked on the substrate. The one or more spacers and the first semiconductor chip are adjacent to respective corners of a lowermost second semiconductor chip, in plan view. The one or more spacers have the same planar shape as the first semiconductor chip.

公开(公告)号：US20190051634A1

公开(公告)日：2019-02-14

申请号：US15860730

申请日：2018-01-03

申请人： Chul Park ,  Seonggwan Lee ,  Minkyeong Park

发明人： Chul Park ,  Seonggwan Lee ,  Minkyeong Park

IPC分类号： H01L25/065

摘要： A semiconductor package includes a substrate including a signal pattern on an upper surface thereof, a chip stack on the substrate, and a first semiconductor chip and one or more spacers between the substrate and the chip stack. The chip stack includes one or more second semiconductor chips stacked on the substrate. The one or more spacers and the first semiconductor chip are adjacent to respective corners of a lowermost second semiconductor chip, in plan view. The one or more spacers have the same planar shape as the first semiconductor chip.