High vacuum apparatus for fabricating semiconductor device and method for forming epitaxial layer using the same
    1.
    发明授权
    High vacuum apparatus for fabricating semiconductor device and method for forming epitaxial layer using the same 失效
    用于制造半导体器件的高真空装置和使用其形成外延层的方法

    公开(公告)号:US06565655B2

    公开(公告)日:2003-05-20

    申请号:US09803859

    申请日:2001-03-12

    IPC分类号: C30B2514

    摘要: A high vacuum apparatus for fabricating a semiconductor device includes a reactive chamber provided with an inlet and an outlet for a reactive gas, a suscepter installed in the reactive chamber for mounting the semiconductor thereon and a vacuum pump connected with the outlet to make the inside of the reactive chamber to put in a high vacuum state, wherein a gas injector of the reactive gas inlet is directed downward of the semiconductor device so that the initial gas flowing of the reactive gas injected from the reactive gas inlet does not directly pass the upper portion of the semiconductor substrate mounted on the suscepter. Since the reactive gas is prevented from cooling and condensing at the upper surface of the semiconductor substrate, defective proportion of the semiconductor device can be remarkably reduced. In addition, the gas outlet is installed at the portion where the reactive gas is satisfactorily cooled and condensed and the vacuum pump is connected with the gas outlet, so that the cooled and condensed contaminant generating source is quickly removed, and thus the defective proportion of the semiconductor device can be considerably reduced.

    摘要翻译: 用于制造半导体器件的高真空装置包括设置有用于反应气体的入口和出口的反应室,安装在反应室中的用于将半导体安装在其上的阻塞器和与出口连接的真空泵, 所述反应室进入高真空状态,其中所述反应气体入口的气体喷射器被引导到所述半导体器件的下方,使得从所述反应气体入口喷射的反应气体的初始气体流不直接通过所述上部 的半导体衬底。 由于防止反应性气体在半导体衬底的上表面处冷却和冷凝,所以可以显着地减少半导体器件的不合格率。 此外,气体出口安装在反应气体被令人满意地冷却和冷凝的部分处,并且真空泵与气体出口连接,使得冷却和冷凝的污染物发生源被快速去除,因此,缺陷比例 可以大大减少半导体器件。

    Layouts for CMOS SRAM cells and devices
    2.
    发明授权
    Layouts for CMOS SRAM cells and devices 有权
    CMOS SRAM单元和器件的布局

    公开(公告)号:US06870231B2

    公开(公告)日:2005-03-22

    申请号:US10292180

    申请日:2002-11-12

    CPC分类号: H01L27/11 H01L27/1104

    摘要: SRAM cells and devices are provided. The SRAM cells may share connections with neighboring cells, including ground, power supply voltage and/or bit line connections. SRAM cells and devices are also provided that include first and second active regions disposed at a semiconductor substrate. Parallel first and second gate electrodes cross over the first and second active regions. One end of the first active region adjacent to the first gate electrode is electrically connected to the second active region adjacent to the first gate electrode through a first node line parallel to the first gate electrode, and the other end of the first active region adjacent to the second gate electrode is electrically connected to the second active region adjacent to the second gate electrode through a second node line parallel to the second gate electrode. The first node line is electrically connected to the second gate electrode through a first local interconnection crossing over the first node line, and the second node line is electrically connected to the first gate electrode through a second local interconnection crossing over the second node line. Additionally, a word line may be in direct contact with gate electrodes of transfer transistors of the SRAM cells.

    摘要翻译: 提供SRAM单元和器件。 SRAM单元可以与相邻单元共享连接,包括地,电源电压和/或位线连接。 还提供了包括设置在半导体衬底上的第一和第二有源区的SRAM单元和器件。 平行的第一和第二栅电极跨过第一和第二有源区。 与第一栅极相邻的第一有源区的一端通过与第一栅电极平行的第一节点线与第一栅电极相邻的第二有源区电连接,并且与第一有源区相邻的第一有源区的另一端 第二栅电极通过与第二栅电极平行的第二节点线电连接到与第二栅电极相邻的第二有源区。 第一节点线通过跨第一节点线的第一局部互连电连接到第二栅极电极,并且第二节点线通过跨第二节点线的第二局部互连电连接到第一栅电极。 此外,字线可以与SRAM单元的转移晶体管的栅电极直接接触。