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公开(公告)号:US08305067B2
公开(公告)日:2012-11-06
申请号:US13025471
申请日:2011-02-11
申请人: Chun Cheung , Weihong Qui , Robert Isham
发明人: Chun Cheung , Weihong Qui , Robert Isham
IPC分类号: G05F1/40
CPC分类号: H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
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公开(公告)号:US07911194B2
公开(公告)日:2011-03-22
申请号:US12840466
申请日:2010-07-21
申请人: Chun Cheung , Weihong Qui , Robert Isham
发明人: Chun Cheung , Weihong Qui , Robert Isham
IPC分类号: G05F1/40
CPC分类号: H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
摘要翻译: 脉冲宽度调制(PWM)控制器和输出级驱动电路以及相关的交流调节器模式信息的方法。 控制器包括当由调节器驱动的负载处于低功率模式时识别间隔的电路。 响应于识别低功率模式,控制器产生具有至少三(3)个不同电平的PWM模式信号,包括耦合到至少一个驱动器的至少一个中间电平。 基于PWM模式信号,调节器切换到省电低功耗工作模式。
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公开(公告)号:US07898310B2
公开(公告)日:2011-03-01
申请号:US12429238
申请日:2009-04-24
申请人: Weihong Qui , Chun Cheung , Emil Chen , Paul Sferrazza , Robert Isham
发明人: Weihong Qui , Chun Cheung , Emil Chen , Paul Sferrazza , Robert Isham
IPC分类号: H03K3/00
CPC分类号: H02M3/1584
摘要: A phase doubler driver circuit includes first control logic generates a first output PWM drive signal and a second output PWM drive signal responsive to an input PWM drive signal. In a first mode of operation, alternating pulses of the input PWM drive are output as the first output PWM drive signal and the second PWM output drive signal respectively. In a second mode of operation, the input PWM drive signal is provided as the first output PWM drive signal when a second phase current associated with the second output PWM drive signal exceeds a first phase current associated with the first output PWM drive signal and the input PWM drive signal is provided as the second output PWM drive signal when the phase current associated with the first output PWM signal exceed the phase current associated with the second output PWM signal. Second control logic adds an offset to a falling edge of the first output PWM drive signal responsive to a difference between a first current associated with the first phase current and an average current and for adding the offset to a falling edge of the second output PWM signal responsive to a difference between a second current associated with the second phase current.
摘要翻译: 相位倍增器驱动器电路包括第一控制逻辑产生响应于输入PWM驱动信号的第一输出PWM驱动信号和第二输出PWM驱动信号。 在第一操作模式中,输入PWM驱动的交替脉冲分别作为第一输出PWM驱动信号和第二PWM输出驱动信号输出。 在第二操作模式中,当与第二输出PWM驱动信号相关联的第二相电流超过与第一输出PWM驱动信号和输入相关联的第一相电流时,输入PWM驱动信号被提供为第一输出PWM驱动信号 当与第一输出PWM信号相关联的相电流超过与第二输出PWM信号相关的相电流时,提供PWM驱动信号作为第二输出PWM驱动信号。 第二控制逻辑响应于与第一相电流相关联的第一电流与平均电流之间的差异,并且将偏移加到第二输出PWM信号的下降沿,将补偿添加到第一输出PWM驱动信号的下降沿 响应于与第二相电流相关联的第二电流之间的差异。
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公开(公告)号:US08115468B2
公开(公告)日:2012-02-14
申请号:US13025453
申请日:2011-02-11
申请人: Chun Cheung , Weihong Qui , Robert Isham
发明人: Chun Cheung , Weihong Qui , Robert Isham
IPC分类号: G05F1/40
CPC分类号: H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
摘要翻译: 脉冲宽度调制(PWM)控制器和输出级驱动电路以及相关的交流调节器模式信息的方法。 控制器包括当由调节器驱动的负载处于低功率模式时识别间隔的电路。 响应于识别低功率模式,控制器产生具有至少三(3)个不同电平的PWM模式信号,包括耦合到至少一个驱动器的至少一个中间电平。 基于PWM模式信号,调节器切换到省电低功耗工作模式。
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公开(公告)号:US20110133717A1
公开(公告)日:2011-06-09
申请号:US13025471
申请日:2011-02-11
申请人: Chun Cheung , Weihong Qui , Robert Isham
发明人: Chun Cheung , Weihong Qui , Robert Isham
IPC分类号: G05F1/618
CPC分类号: H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
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公开(公告)号:US07782035B2
公开(公告)日:2010-08-24
申请号:US11935535
申请日:2007-11-06
申请人: Chun Cheung , Weihong Qiu , Robert Isham
发明人: Chun Cheung , Weihong Qiu , Robert Isham
IPC分类号: G05F1/40
CPC分类号: H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
摘要翻译: 脉冲宽度调制(PWM)控制器和输出级驱动电路以及相关的交流调节器模式信息的方法。 控制器包括当由调节器驱动的负载处于低功率模式时识别间隔的电路。 响应于识别低功率模式,控制器产生具有至少三(3)个不同电平的PWM模式信号,包括耦合到至少一个驱动器的至少一个中间电平。 基于PWM模式信号,调节器切换到省电低功耗工作模式。
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公开(公告)号:US20100079175A1
公开(公告)日:2010-04-01
申请号:US12429238
申请日:2009-04-24
申请人: Weihong Qiu , Chun Cheung , Emil Chen , Paul Sferrazza , Robert Isham
发明人: Weihong Qiu , Chun Cheung , Emil Chen , Paul Sferrazza , Robert Isham
CPC分类号: H02M3/1584
摘要: A phase doubler driver circuit includes a first input for receiving a input PWM drive signal. First control logic generates a first output PWM drive signal and a second output PWM drive signal responsive to the input PWM drive signal. In a first mode of operation, alternating pulses of the input PWM drive are output as the first output PWM drive signal and the second PWM output drive signal respectively. In a second mode of operation, the input PWM drive signal is provided as the first output PWM drive signal when a second phase current associated with the second output PWM drive signal exceeds a first phase current associated with the first output PWM drive signal and the input PWM drive signal is provided as the second output PWM drive signal when the phase current associated with the first output PWM signal exceed the phase current associated with the second output PWM signal. Second control logic adds an offset to a falling edge of the first output PWM drive signal responsive to a difference between a first current associated with the first phase current and an average current and for adding the offset to a falling edge of the second output PWM signal responsive to a difference between a second current associated with the second phase current and the average current, wherein the average current comprises the average of the first current and the second current. Drive circuitry generates drive signals responsive to each of the first output PWM drive signal and the second output PWM drive signal.
摘要翻译: 倍增器驱动器电路包括用于接收输入PWM驱动信号的第一输入端。 第一控制逻辑产生响应于输入PWM驱动信号的第一输出PWM驱动信号和第二输出PWM驱动信号。 在第一操作模式中,输入PWM驱动的交替脉冲分别作为第一输出PWM驱动信号和第二PWM输出驱动信号输出。 在第二操作模式中,当与第二输出PWM驱动信号相关联的第二相电流超过与第一输出PWM驱动信号和输入相关联的第一相电流时,输入PWM驱动信号被提供为第一输出PWM驱动信号 当与第一输出PWM信号相关联的相电流超过与第二输出PWM信号相关的相电流时,提供PWM驱动信号作为第二输出PWM驱动信号。 第二控制逻辑响应于与第一相电流相关联的第一电流与平均电流之间的差异,并且将偏移加到第二输出PWM信号的下降沿,将补偿添加到第一输出PWM驱动信号的下降沿 响应于与第二相电流相关联的第二电流与平均电流之间的差异,其中平均电流包括第一电流和第二电流的平均值。 驱动电路根据第一输出PWM驱动信号和第二输出PWM驱动信号中的每一个产生驱动信号。
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公开(公告)号:US20110133716A1
公开(公告)日:2011-06-09
申请号:US13025453
申请日:2011-02-11
申请人: Chun Cheung , Weihong Qiu , Robert Isham
发明人: Chun Cheung , Weihong Qiu , Robert Isham
IPC分类号: G05F1/618
CPC分类号: H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
摘要翻译: 脉冲宽度调制(PWM)控制器和输出级驱动电路以及相关的交流调节器模式信息的方法。 控制器包括当由调节器驱动的负载处于低功率模式时识别间隔的电路。 响应于识别低功率模式,控制器产生具有至少三(3)个不同电平的PWM模式信号,包括耦合到至少一个驱动器的至少一个中间电平。 基于PWM模式信号,调节器切换到省电低功耗工作模式。
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公开(公告)号:US20100283523A1
公开(公告)日:2010-11-11
申请号:US12840466
申请日:2010-07-21
申请人: Chun Cheung , Weihong Qiu , Robert Isham
发明人: Chun Cheung , Weihong Qiu , Robert Isham
IPC分类号: H03K5/02
CPC分类号: H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
摘要翻译: 脉冲宽度调制(PWM)控制器和输出级驱动电路以及相关的交流调节器模式信息的方法。 控制器包括当由调节器驱动的负载处于低功率模式时识别间隔的电路。 响应于识别低功率模式,控制器产生具有至少三(3)个不同电平的PWM模式信号,包括耦合到至少一个驱动器的至少一个中间电平。 基于PWM模式信号,调节器切换到省电低功耗工作模式。
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公开(公告)号:US20080238392A1
公开(公告)日:2008-10-02
申请号:US11935535
申请日:2007-11-06
申请人: Chun Cheung , Weihong Qiu , Robert Isham
发明人: Chun Cheung , Weihong Qiu , Robert Isham
CPC分类号: H02M3/1584 , H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
摘要翻译: 脉冲宽度调制(PWM)控制器和输出级驱动电路以及相关的交流调节器模式信息的方法。 控制器包括当由调节器驱动的负载处于低功率模式时识别间隔的电路。 响应于识别低功率模式,控制器产生具有至少三(3)个不同电平的PWM模式信号,包括耦合到至少一个驱动器的至少一个中间电平。 基于PWM模式信号,调节器切换到省电低功耗工作模式。
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