公开(公告)号：US20040210801A1

公开(公告)日：2004-10-21

申请号：US10417443

申请日：2003-04-16

Applicant: Cirrus Logic, Inc.

Inventor： Ammisetti V. Prasad ,  Karl Thompson ,  John Laurence Melanson ,  Shyam Somayajula

IPC: G11B005/00 ,  G06K005/04 ,  G11B020/20

CPC classification number: G11C27/024

Abstract: A sample and hold circuit including a sampling capacitor for storing a sample of an input signal, an output stage for outputting the sample stored on the sampling capacitor; and input circuitry for sampling the input signal and storing the sample on the sampling capacitor. The input circuitry includes an autozeroing input buffer which selectively samples the input signal during a first operating phase and holds a sample of the input signal during a second operating phase. The autozeroing input buffer cancels any offset error. The input circuitry also includes switching circuitry for selectively coupling the sampling capacitor with an input of the sample and hold circuitry during the second operating phase and to an output of the autozeroing input buffer during the first operating phase.

Abstract translation: 一种采样保持电路，包括用于存储输入信号的采样的采样电容器，用于输出存储在采样电容器上的样本的输出级; 以及用于对输入信号进行采样并将采样存储在采样电容器上的输入电路。 输入电路包括自动调零输入缓冲器，其在第一操作阶段期间选​​择性地采样输入信号，并且在第二操作阶段期间保持输入信号的采样。 自动归零输入缓冲器取消任何偏移误差。 输入电路还包括用于在第二操作阶段期间将采样电容器与采样和保持电路的输入有选择地耦合的开关电路，以及在第一操作阶段期间自动调零输入缓冲器的输出。