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    Audio data processing systems and methods utilizing high oversampling rates
    1.
    发明申请
    Audio data processing systems and methods utilizing high oversampling rates 有权
    使用高过采样速率的音频数据处理系统和方法

    公开(公告)号：US20040193296A1

    公开(公告)日：2004-09-30

    申请号：US10397767

    申请日：2003-03-26

    Applicant: Cirrus Logic, Inc.

    Inventor： John Laurence Melanson

    IPC: G06F017/00 ,  G10L019/00

    CPC classification number: G10L19/038 ,  G10L19/008

    Abstract: A method of processing digital audio data includes receiving an input stream of audio data having a first quantization and a high oversampling rate. The input stream is requantized in a first processing block at the high oversampling rate to a second quantization. The requantized stream of audio data is processed in a second processing block at the high oversampling rate and the second quantization.

    Abstract translation: 一种处理数字音频数据的方法包括接收具有第一量化和高过采样速率的音频数据的输入流。 将输入流以高过采样速率在第一处理块中重新量化为第二量化。 音频数据的再量化流以高过采样速率和第二量化在第二处理块中进行处理。

    Data converters with digitally filtered pulse width modulation output stages and methods and systems using the same
    3.
    发明申请
    Data converters with digitally filtered pulse width modulation output stages and methods and systems using the same 有权
    具有数字滤波的脉冲宽度调制输出级的数据转换器及使用其的方法和系统

    公开(公告)号：US20040189503A1

    公开(公告)日：2004-09-30

    申请号：US10824575

    申请日：2004-04-14

    Applicant: Cirrus Logic, Inc.

    Inventor： John Laurence Melanson

    IPC: H03M001/82 ,  H03M003/00

    CPC classification number: H03M3/372 ,  H03M3/506

    Abstract: A digital to analog converter including a noise shaping modulator for modulating an input digital data stream, a plurality of output elements for generating a plurality of intermediate data streams from a modulated output stream from the modulator, and an output summer for summing the intermediate data streams to generate an output analog stream. The noise shaping modulator balances an edge transition rate of the output elements, such that the edge transition rate of two selected elements is approximately equal.

    Abstract translation: 一种数模转换器，包括用于调制输入数字数据流的噪声整形调制器，用于从调制器的调制输出流产生多个中间数据流的多个输出元件，以及用于对中间数据流进行求和的输出加法器 以产生输出模拟流。 噪声整形调制器平衡输出元件的边沿跃迁速率，使得两个选定元件的边沿跃迁速率近似相等。

    Delta-sigma modulators with improved noise performance
    4.
    发明申请
    Delta-sigma modulators with improved noise performance 有权
    具有改进噪声性能的Delta-Σ调制器

    公开(公告)号：US20040108947A1

    公开(公告)日：2004-06-10

    申请号：US10643127

    申请日：2003-08-18

    Applicant: Cirrus Logic, Inc.

    Inventor： YuQing Yang ,  John Laurence Melanson

    IPC: H03M003/00

    CPC classification number: H03M3/368 ,  H03M3/424 ,  H03M3/452

    Abstract: An integrator stage for use in a delta sigma modulator includes an operational amplifier, an integration capacitor coupling an output of the operational amplifier and a summing node at an input of the operational amplifier, and a feedback path. The feedback path includes first and second capacitors having first plates coupled electrically in common at a common plate node and switching circuitry for sampling selected reference voltages onto second plates of the capacitors during a sampling phase. The integrator stage further includes a switch for selectively coupling the common plate node and the summing node during an integration phase.

    Abstract translation: 用于Δ-Σ调制器的积分器级包括运算放大器，耦合运算放大器的输出的积分电容器和运算放大器输入端的求和节点和反馈路径。 反馈路径包括第一和第二电容器，该第一和第二电容器具有在公共板节点处共同电耦合的第一板和用于在采样阶段期间将选定的参考电压采样到电容器的第二板上的开关电路。 积分器级还包括用于在积分阶段期间选​​择性地耦合公共板节点和求和节点的开关。

    Non-invasive, low pin count test circuits and methods utilizing emulated stress conditions
    5.
    发明申请
    Non-invasive, low pin count test circuits and methods utilizing emulated stress conditions 审中-公开
    非侵入性，低引脚数测试电路和利用模拟应力条件的方法

    公开(公告)号：US20040193977A1

    公开(公告)日：2004-09-30

    申请号：US10464212

    申请日：2003-06-18

    Applicant: Cirrus Logic, Inc.

    Inventor： Murari Kejariwal ,  John Laurence Melanson ,  Ammisetti V. Prasad ,  Xiaohong Sherry Wu

    IPC: G01R031/28

    CPC classification number: G01R31/2884

    Abstract: A method of testing an internal block of an integrated circuit includes testing an internal block under a selected operating condition by setting a selected operating parameter to a value emulating operation of the internal block under another operating condition to detect potential failure of the internal block under the another operating condition.

    Abstract translation: 一种测试集成电路的内部块的方法包括在所选择的操作条件下测试内部块，在另一操作条件下将所选择的操作参数设置为内部块的值仿真操作，以检测内部块的潜在故障 另一个操作条件。

    Delta-sigma amplifiers with output stage supply voltage variation compensations and methods and digital amplifier systems using the same
    7.
    发明申请
    Delta-sigma amplifiers with output stage supply voltage variation compensations and methods and digital amplifier systems using the same 有权
    具有输出级电源电压变化补偿的三角Σ放大器和使用其的数字放大器系统

    公开(公告)号：US20040228416A1

    公开(公告)日：2004-11-18

    申请号：US10791181

    申请日：2004-03-02

    Applicant: Cirrus Logic, Inc.

    Inventor： Jack Anderson ,  John Laurence Melanson

    IPC: H04B014/06

    CPC classification number: H03F3/2175 ,  H03F2200/331

    Abstract: A delta-sigma modulator for driving an output stage is disclosed. The delta-sigma modulator operates between first and second voltages and includes a loop filter, a quantizer, and a feedback loop coupling an output of the quantizer and an input of the loop filter. The feedback loop includes compensation circuitry for compensating for variations in the first and second voltages in response to a measured average of the first and second voltages and a measured difference between the first and second voltages. Measuring circuitry measures the average and the difference of the first and second voltages.

    Abstract translation: 公开了用于驱动输出级的Δ-Σ调制器。 Δ-Σ调制器在第一和第二电压之间工作，并且包括环路滤波器，量化器和耦合量化器的输出和环路滤波器的输入的反馈环路。 反馈回路包括补偿电路，用于响应于测量的第一和第二电压的平均值和第一和第二电压之间的测量的差值来补偿第一和第二电压的变化。 测量电路测量第一和第二电压的平均值和差值。

    Noise-shapers and filters with noise shaping quantizers and systems and methods using the same
    8.
    发明申请
    Noise-shapers and filters with noise shaping quantizers and systems and methods using the same 有权
    具有噪声整形量化器的噪声整形器和滤波器以及使用其的系统和方法

    公开(公告)号：US20040190728A1

    公开(公告)日：2004-09-30

    申请号：US10397556

    申请日：2003-03-26

    Applicant: Cirrus Logic, Inc

    Inventor： John Laurence Melanson

    IPC: A61F011/06 ,  H04B015/00 ,  H03B029/00

    CPC classification number: H03H17/04 ,  H03B29/00 ,  H03M7/3028 ,  H03M7/304

    Abstract: A noise shaping system including an inner loop and outer noise shaping loops. The inner noise shaping loop includes an inner loop filter and a quantizer for quantizing an output of the inner loop filter. The outer noise shaping loop includes an outer loop filter having an input receiving feedback from the quantizer of the inner noise shaping loop and an output driving an input of the inner loop filter of the inner noise shaping loop.

    Abstract translation: 一种噪声整形系统，包括内环和外噪声整形环。 内部噪声整形环路包括用于量化内部环路滤波器的输出的内部环路滤波器和量化器。 外部噪声整形回路包括外部环路滤波器，其具有接收来自内部噪声整形环路的量化器的反馈的输入和驱动内部噪声整形环路的内部环路滤波器的输入的输出。

    Sample and hold circuits and methods with offset error correction and systems using the same
    10.
    发明申请
    Sample and hold circuits and methods with offset error correction and systems using the same 有权
    采样和保持电路以及具有偏移误差校正的方法及使用其的系统

    公开(公告)号：US20040210801A1

    公开(公告)日：2004-10-21

    申请号：US10417443

    申请日：2003-04-16

    Applicant: Cirrus Logic, Inc.

    Inventor： Ammisetti V. Prasad ,  Karl Thompson ,  John Laurence Melanson ,  Shyam Somayajula

    IPC: G11B005/00 ,  G06K005/04 ,  G11B020/20

    CPC classification number: G11C27/024

    Abstract: A sample and hold circuit including a sampling capacitor for storing a sample of an input signal, an output stage for outputting the sample stored on the sampling capacitor; and input circuitry for sampling the input signal and storing the sample on the sampling capacitor. The input circuitry includes an autozeroing input buffer which selectively samples the input signal during a first operating phase and holds a sample of the input signal during a second operating phase. The autozeroing input buffer cancels any offset error. The input circuitry also includes switching circuitry for selectively coupling the sampling capacitor with an input of the sample and hold circuitry during the second operating phase and to an output of the autozeroing input buffer during the first operating phase.

    Abstract translation: 一种采样保持电路，包括用于存储输入信号的采样的采样电容器，用于输出存储在采样电容器上的样本的输出级; 以及用于对输入信号进行采样并将采样存储在采样电容器上的输入电路。 输入电路包括自动调零输入缓冲器，其在第一操作阶段期间选​​择性地采样输入信号，并且在第二操作阶段期间保持输入信号的采样。 自动归零输入缓冲器取消任何偏移误差。 输入电路还包括用于在第二操作阶段期间将采样电容器与采样和保持电路的输入有选择地耦合的开关电路，以及在第一操作阶段期间自动调零输入缓冲器的输出。

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