公开(公告)号：US20230006612A1

公开(公告)日：2023-01-05

申请号：US17940332

申请日：2022-09-08

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Chandra PRAKASH ,  Cory J. PETERSON ,  Eric KIMBALL

IPC: H03F1/32 ,  H03F3/217

Abstract: An amplifier system may include a first stage having a plurality of inputs configured to receive a differential pulse-width modulation input signal and generate an intermediate signal based on the differential pulse-width modulation input signal, a quantizer configured to generate a modulated signal based on the intermediate signal, a single-ended class-D output stage configured to generate a single-ended output signal as a function of the differential pulse-width modulation input signal, a feedback network configured to feed back the single-ended output signal to a first input of the plurality of inputs and to feed back a ground voltage to a second input of the plurality of inputs, a plurality of buffers, each particular buffer configured to receive a respective component of the differential pulse-width modulation input signal and generate a respective buffered component, and an input network coupled between the plurality of buffers and the first stage. Each particular buffer of the plurality of buffers may include a buffering subcircuit configured to buffer the respective component of the differential pulse-width modulation input signal associated with the particular buffer in order to generate the respective buffered component and a biasing subcircuit configured to limit a magnitude of the respective component of the differential pulse-width modulation input signal driven to circuitry of the buffering subcircuit for driving the respective buffered component.

公开(公告)号：US20210211099A1

公开(公告)日：2021-07-08

申请号：US16732993

申请日：2020-01-02

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Eric KIMBALL ,  Chandra PRAKASH ,  Ramin ZANBAGHI ,  Cory J. PETERSON

IPC: H03F1/26 ,  H03F3/217 ,  H03F3/183

Abstract: A system may include a forward signal path having a forward gain and configured to receive an input signal at an input and generate an output signal at an output as a function of the input signal, a feedback signal path having a feedback gain and coupled between the output and the input, and a control subsystem configured to operate the forward signal path and the feedback signal path in at least two modes comprising a first mode in which the forward gain is a first forward gain and the feedback gain is a first feedback gain and a second mode in which the forward gain is a second forward gain smaller than the first forward gain and the feedback gain is a second feedback gain larger than the first feedback gain. The control subsystem may cause operation in the first mode when signal content is present in the input signal and may cause operation in the second mode when signal content is absent from the input signal.