-
公开(公告)号：US20230003779A1
公开(公告)日：2023-01-05
申请号：US17668445
申请日：2022-02-10
Inventor： Saurabh SINGH , Chandra B. PRAKASH , Eric KIMBALL , Cory J. PETERSON , Ryan LOBO
IPC: G01R27/08
Abstract: A method for estimating resistances of a circuit having a plurality of resistances comprising a first resistance and a second resistance may include applying a first bias voltage across the circuit and measuring a first voltage at a common node between the first resistance and the second resistance in order to determine a mathematical relationship between the first resistance and the second resistance, applying a second bias voltage across the circuit and a third resistance in parallel with the circuit and measuring a second voltage at the common node between the first resistance and the second resistance in order to determine a mathematical relationship between the third resistance and at least one of the first resistance and the second resistance, and based on at least the measurement of the first voltage and the measurement of the second voltage, determining the first resistance and the second resistance as a function of the third resistance.
-
公开(公告)号：US20230006612A1
公开(公告)日：2023-01-05
申请号：US17940332
申请日：2022-09-08
Inventor： Chandra PRAKASH , Cory J. PETERSON , Eric KIMBALL
Abstract: An amplifier system may include a first stage having a plurality of inputs configured to receive a differential pulse-width modulation input signal and generate an intermediate signal based on the differential pulse-width modulation input signal, a quantizer configured to generate a modulated signal based on the intermediate signal, a single-ended class-D output stage configured to generate a single-ended output signal as a function of the differential pulse-width modulation input signal, a feedback network configured to feed back the single-ended output signal to a first input of the plurality of inputs and to feed back a ground voltage to a second input of the plurality of inputs, a plurality of buffers, each particular buffer configured to receive a respective component of the differential pulse-width modulation input signal and generate a respective buffered component, and an input network coupled between the plurality of buffers and the first stage. Each particular buffer of the plurality of buffers may include a buffering subcircuit configured to buffer the respective component of the differential pulse-width modulation input signal associated with the particular buffer in order to generate the respective buffered component and a biasing subcircuit configured to limit a magnitude of the respective component of the differential pulse-width modulation input signal driven to circuitry of the buffering subcircuit for driving the respective buffered component.
-
3.发明申请公开(公告)号：US20210351751A1
公开(公告)日：2021-11-11
申请号：US16869226
申请日：2020-05-07
Inventor： Ramin ZANBAGHI , Cory J. PETERSON , Eric KIMBALL
Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor. The system may additionally include a modulator for generating a differential pulse-width modulation driving signal to the first high-side switch, the second high-side switch, the first low-side switch, and the second low-side switch and pilot tone injection circuitry configured to inject a periodic pilot tone into the differential pulse-width modulation driving signal at a pilot tone frequency.
-
公开(公告)号：US20210088634A1
公开(公告)日：2021-03-25
申请号：US16812920
申请日：2020-03-09
Inventor： Eric KIMBALL , Kyriaki FOTOPOULOU
IPC: G01S7/4863 , G01S17/10 , G01S7/489 , G01S7/497 , G01J1/44
Abstract: A method may include operating a single-photon avalanche diode (SPAD) in a first mode to determine a light intensity level associated with the SPAD, operating the SPAD in a second mode wherein a reverse bias voltage is applied in the second mode to bias the SPAD beyond its breakdown voltage, such that the SPAD operates in a detection mode, and determining a magnitude of the bias voltage applied to the SPAD in the second mode based on the light intensity level determined in the first mode.
-
Patent Agency Ranking
5.发明申请公开(公告)号：US20220158597A1
公开(公告)日：2022-05-19
申请号：US17667234
申请日：2022-02-08
Inventor： Ramin ZANBAGHI , Cory J. PETERSON , Eric KIMBALL
Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor. The system may additionally include a modulator for generating a differential pulse-width modulation driving signal to the first high-side switch, the second high-side switch, the first low-side switch, and the second low-side switch and pilot tone injection circuitry configured to inject a periodic pilot tone into the differential pulse-width modulation driving signal at a pilot tone frequency.
-
公开(公告)号：US20210211099A1
公开(公告)日：2021-07-08
申请号：US16732993
申请日：2020-01-02
Inventor： Eric KIMBALL , Chandra PRAKASH , Ramin ZANBAGHI , Cory J. PETERSON
Abstract: A system may include a forward signal path having a forward gain and configured to receive an input signal at an input and generate an output signal at an output as a function of the input signal, a feedback signal path having a feedback gain and coupled between the output and the input, and a control subsystem configured to operate the forward signal path and the feedback signal path in at least two modes comprising a first mode in which the forward gain is a first forward gain and the feedback gain is a first feedback gain and a second mode in which the forward gain is a second forward gain smaller than the first forward gain and the feedback gain is a second feedback gain larger than the first feedback gain. The control subsystem may cause operation in the first mode when signal content is present in the input signal and may cause operation in the second mode when signal content is absent from the input signal.
-
公开(公告)号：US20210344310A1
公开(公告)日：2021-11-04
申请号：US17003564
申请日：2020-08-26
Inventor： Ramin ZANBAGHI , Cory J. PETERSON , Anand ILANGO , Eric KIMBALL
IPC: H03F3/217 , H03F3/45 , G05F1/46 , H03F1/38 , G01R1/20 , G01R19/175 , G01R19/165 , H04R1/10
Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second high-side switch and the supply voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second high-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.
-
公开(公告)号：US20210344309A1
公开(公告)日：2021-11-04
申请号：US16864893
申请日：2020-05-01
Inventor： Ramin ZANBAGHI , Cory J. PETERSON , Anand ILANGO , Eric KIMBALL
IPC: H03F3/217
Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second low-side switch and the ground voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second low-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.
-
公开(公告)号：US20210050832A1
公开(公告)日：2021-02-18
申请号：US16986623
申请日：2020-08-06
Inventor： Jason W. LAWRENCE , Eric J. KING , Christian LARSEN , Hasnain AKRAM , Eric KIMBALL
Abstract: A method for operating a charge pump having a variable switching frequency may include comparing a target minimum output voltage with an output voltage generated at an output of the charge pump and controlling switching of switches of the charge pump based on the comparison such that the variable switching frequency varies as an output current driven by the charge pump varies.
-
-
-
-
-
-
-
-
Search Results
9
records
(took 0.018 seconds)
