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1.
公开(公告)号:US10951225B1
公开(公告)日:2021-03-16
申请号:US16821667
申请日:2020-03-17
Inventor: Donelson A. Shannon , Edmund M. Schneider , Jianping Wen
Abstract: A SAR ADC may include a plurality of capacitor networks, wherein each capacitor network of the plurality of capacitor networks has a sampling capacitor for sampling an analog input signal to the SAR ADC and at least one non-sampling capacitor. The SAR ADC may also include a DAC including a plurality of sub-DACs including at least a first sub-DAC representing most significant bits of an output of the SAR ADC, wherein the output of the first sub-DAC is coupled to the sampling capacitors of the plurality of capacitor networks and a second sub-DAC representing bits of the output of the SAR ADC lesser in magnitude significance than those of the first sub-DAC, wherein the output of the second sub-DAC is coupled to a respective one of at least one non-sampling capacitor of each of the plurality of capacitor networks.
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公开(公告)号:US12034442B2
公开(公告)日:2024-07-09
申请号:US17948442
申请日:2022-09-20
Inventor: Donelson A. Shannon , Jianping Wen
IPC: G11C5/14 , G11C17/00 , H03K19/0185
CPC classification number: H03K19/018507 , G11C5/14 , G11C17/00
Abstract: A system may include a first power domain defined by a first supply rail and a first ground rail, a second power domain defined by a second supply rail and a second ground rail, and a configurable switch coupled between the first ground rail and the second ground rail such that when the configurable switch is enabled, the first ground rail and the second ground rail are electrically shorted to one another and when the configurable switch is disabled, the first ground rail and the second ground rail are electrically isolated from one another.
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