公开(公告)号：US11668738B2

公开(公告)日：2023-06-06

申请号：US17354237

申请日：2021-06-22

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Mehul Mistry ,  Rupesh Khare ,  Jack Fuller

IPC: G01R27/26 ,  G01R31/28 ,  H04R29/00

CPC classification number: G01R27/2605 ,  G01R31/2825 ,  H04R29/001

Abstract: Circuitry for detecting a capacitive load coupled between a first node and a second node, the circuitry comprising: drive circuitry for applying a first voltage to a first node over a first time period; processing circuitry configured to: measure a second voltage at the first node; and determine that the load is a capacitive load based on the second voltage.