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公开(公告)号:US20210055754A1
公开(公告)日:2021-02-25
申请号:US16984880
申请日:2020-08-04
Inventor: Sunder KIDAMBI , Mohit SOOD , Roderick D. HOLLEY , John C. TUCKER
IPC: G05F1/625
Abstract: A data acquisition system may include an input for receiving an input signal for the data acquisition system, a plurality of data paths including a first data path and a second data path, and a signal estimator configured to determine a magnitude of the input signal using estimation of the input signal and dynamically deactivate one of the first and second data paths based on the magnitude of the input signal.
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公开(公告)号:US20240133955A1
公开(公告)日:2024-04-25
申请号:US18326238
申请日:2023-05-30
Inventor: Aleksey S. KHENKIN , John C. TUCKER , Ravi K. KUMMARAGUNTLA
IPC: G01R31/36 , G01R31/385 , G01R31/389 , H01M10/48
CPC classification number: G01R31/3648 , G01R31/385 , G01R31/389 , H01M10/48
Abstract: A system for performing a measurement on a component, the system comprising: an integrated circuit (IC) comprising: analog to digital (ADC) converter circuitry; and processing circuitry, wherein the system further comprises: difference circuitry, wherein: the difference circuitry is operable to generate a compensated measurement voltage by subtracting a compensation voltage received from a voltage source external to the integrated circuit from a measurement voltage output by the component in response to a stimulus signal received by the component; the ADC circuitry is configured to convert the compensated measurement voltage into a digital compensated measurement signal; and the measurement circuitry is configured to generate a measurement result based on the digital compensated measurement signal.
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公开(公告)号:US20240230765A9
公开(公告)日:2024-07-11
申请号:US18326238
申请日:2023-05-31
Inventor: Aleksey S. KHENKIN , John C. TUCKER , Ravi K. KUMMARAGUNTLA
IPC: G01R31/36 , G01R31/385 , G01R31/389 , H01M10/48
CPC classification number: G01R31/3648 , G01R31/385 , G01R31/389 , H01M10/48
Abstract: A system for performing a measurement on a component, the system comprising: an integrated circuit (IC) comprising: analog to digital (ADC) converter circuitry; and processing circuitry, wherein the system further comprises: difference circuitry, wherein: the difference circuitry is operable to generate a compensated measurement voltage by subtracting a compensation voltage received from a voltage source external to the integrated circuit from a measurement voltage output by the component in response to a stimulus signal received by the component; the ADC circuitry is configured to convert the compensated measurement voltage into a digital compensated measurement signal; and the measurement circuitry is configured to generate a measurement result based on the digital compensated measurement signal.
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公开(公告)号:US20250076343A1
公开(公告)日:2025-03-06
申请号:US18666028
申请日:2024-05-16
Inventor: Aleksey KHENKIN , Ravi K. KUMMARAGUNTLA , John C. TUCKER , John L. MELANSON
Abstract: In accordance with embodiments of the present disclosure, a system may include a main integrated circuit (IC) comprising current measurement circuitry, an auxiliary current sense resistor coupled to the main IC, and an auxiliary pair of Kelvin sense resistors coupled between the auxiliary current sense resistor and the current measurement circuitry. The main IC may further comprise current injection circuitry configured to inject a known sink current which is split between a main current in a first path and an auxiliary current in a second path comprising the auxiliary current sense resistor.
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公开(公告)号:US20220255515A1
公开(公告)日:2022-08-11
申请号:US17173813
申请日:2021-02-11
Inventor: Ravi K. KUMMARAGUNTLA , Christophe J. AMADI , John L. MELANSON , Axel THOMSEN , John C. TUCKER , Eric J. KING
IPC: H03F3/387 , G01R31/40 , G01R31/3842
Abstract: A signal processing system may include a signal path and a chop management circuit. The signal path may comprise a chopper configured to chop a differential input signal to the signal path at a chopping frequency and a low-pass filter downstream of the chopper and configured to filter out intermodulation products of a direct current offset of the signal path and intermodulation products of an aggressor on the differential input signal in order to generate an output signal. The chop management circuit may be communicatively coupled to the chopper and configured to, based on operational parameters associated with the signal path, dynamically manage energy of one or more clock signals used to define the chopping frequency.
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公开(公告)号:US20170180858A1
公开(公告)日:2017-06-22
申请号:US15198809
申请日:2016-06-30
Inventor: Sunder S. KIDAMBI , John C. TUCKER , Aleksey KHENKIN
CPC classification number: H04R3/06 , H04R29/004 , H04R2201/003
Abstract: In accordance with embodiments of the present disclosure, a system may include a digital correcting network for correcting for an intrinsic highpass filter of a microelectromechanical systems (MEMS) microphone such that a combined phase and magnitude response of a cascade of the intrinsic highpass filter and the digital correcting network substantially approximates the response of a target highpass filter.
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