公开(公告)号：US20230299575A1

公开(公告)日：2023-09-21

申请号：US18183817

申请日：2023-03-14

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： David P. SINGLETON ,  Andrew J. HOWLETT ,  Sharjeel RIAZ ,  John B. BOWLERWELL

IPC: H02H7/20 ,  H02H1/00

CPC classification number: H02H7/20 ,  H02H1/0007

Abstract: An integrated circuit (IC), comprising: a converter comprising: one or more core devices; and one or more output internal nodes, each internal node coupled to one of the one or more core devices; protection circuitry comprising: one or more isolation switches, each of the one or more isolation switches coupled between a respective one of the one or more internal output nodes and a respective output external pin of the IC, wherein the protection circuitry configured to: monitor a characteristic at each respective external output pin of the IC; and if the characteristic is outside an operating specification of the one or more core devices, open one or more of the one or more isolation switches to isolate one or more of the one or more core devices from the respective external pin of the IC.

公开(公告)号：US20210250685A1

公开(公告)日：2021-08-12

申请号：US17158540

申请日：2021-01-26

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Andrew J. HOWLETT ,  Sharjeel RIAZ ,  John P. LESSO

IPC: H04R3/02 ,  H03F3/181

Abstract: This application relates to driver circuitry (200) for receiving a digital input signal (D) and outputting, at first and second output nodes (203p, 203n), first and second analogue driving signals respectively for driving a transducer (101), e.g. loudspeaker, in a bridge-tied-load configuration. The driver circuitry may particularly be suitable for driving low-impedance transducers. The driver circuitry has first and second digital-to-analogue converters (201p, 201n) configured to receive the digital input signal and the outputs of the first and second digital-to-analogue converters are coupled to the first and second output nodes respectively. A differential-output amplifier circuit (202) has outputs connected to the first and second output nodes and is configured to regulate the outputs of the digital-to-analogue converters at output nodes to provide the analogue driving signals.