公开(公告)号：US20250070715A1

公开(公告)日：2025-02-27

申请号：US18456373

申请日：2023-08-25

Applicant: Cisco Technology, Inc.

Inventor： Abhishek BHAT ,  Joseph V. PAMPANIN

IPC: H03B5/12 ,  H03L7/099

Abstract: A voltage-controlled oscillator (VCO) is disclosed that includes an inductor-capacitor (LC) tank coupled with a first voltage supply node, a pair of cross-coupled transistors that are coupled with the LC tank and coupled with each other at a tail node, and a high-frequency current return path to the first voltage supply node. The high-frequency return path includes a first decoupling capacitor coupled with the first voltage supply node and a second voltage supply node, and a first inductor coupled with the tail node and the second voltage supply node. The first inductor is formed as a first conductive trace and has a quality factor (Q) value of 25 or greater.

公开(公告)号：US20240426676A1

公开(公告)日：2024-12-26

申请号：US18341543

申请日：2023-06-26

Applicant: Cisco Technology, Inc.

Inventor： Sujit HANDANHAL RAMACHANDRA ,  Abhishek BHAT ,  Prajwal M. KASTURI

IPC: G01K7/18 ,  G02F1/01 ,  H04B10/40

Abstract: The present disclosure describes systems and methods for detecting temperature in an electro-optical circuit (e.g., an electro-optical transceiver). According to an embodiment, an electro-optical circuit includes a photonic integrated circuit and an electronic integrated circuit. The photonic integrated circuit includes an optical component and a first resistor positioned by the optical component. The electronic integrated circuit determines a temperature for the optical component based on a first resistance of the first resistor.

公开(公告)号：US20220345102A1

公开(公告)日：2022-10-27

申请号：US17302001

申请日：2021-04-21

Applicant: Cisco Technology, Inc.

Inventor： Abhishek BHAT ,  Romesh Kumar NANDWANA ,  Kadaba LAKSHMIKUMAR

IPC: H03H7/01 ,  H03H7/06

Abstract: A multi-port coupled inductor with interference suppression is provided with a first signal port connected to a first resistor port via a first inductor; a second resistor port connected to the first resistor port via a second inductor; a second signal port connected to the second resistor port via a third inductor; a third resistor port connected to the first resistor port via a first resistor; a fourth resistor port connected to the third resistor port via a fourth inductor and to the second resistor port via a second resistor; a third signal port connected to the third resistor port via a fifth inductor; and a fourth signal port connected to the fourth resistor port via a sixth inductor.