公开(公告)号：US20250030497A1

公开(公告)日：2025-01-23

申请号：US18353781

申请日：2023-07-17

Applicant: Cisco Technology, Inc.

Inventor： Vipulkumar K. PATEL ,  Romesh Kumar NANDWANA ,  Norbert SCHLEPPLE ,  Eng Wen ONG ,  Prakash B. GOTHOSKAR

IPC: H04J14/06 ,  H04B10/67

Abstract: The present disclosure describes an optical system and method of operating the optical system. The optical system includes a substrate and first and second photonic integrated circuits. The first photonic integrated circuit is positioned on the substrate. The second photonic integrated circuit is positioned on the first photonic integrated circuit. The second photonic integrated circuit receives a first optical signal that includes a first mode and a second mode. The second photonic integrated circuit includes a polarization splitter rotator, a first demultiplexer, and a second demultiplexer. The polarization splitter rotator separates the first optical signal into a second optical with the first mode and a third optical signal with the first mode. The first and second demultiplexers separate the second and third optical signals into first and second pluralities of optical signals. The first and second pluralities of optical signals couple into the first photonic integrated circuit.

公开(公告)号：US20220345102A1

公开(公告)日：2022-10-27

申请号：US17302001

申请日：2021-04-21

Applicant: Cisco Technology, Inc.

Inventor： Abhishek BHAT ,  Romesh Kumar NANDWANA ,  Kadaba LAKSHMIKUMAR

IPC: H03H7/01 ,  H03H7/06

Abstract: A multi-port coupled inductor with interference suppression is provided with a first signal port connected to a first resistor port via a first inductor; a second resistor port connected to the first resistor port via a second inductor; a second signal port connected to the second resistor port via a third inductor; a third resistor port connected to the first resistor port via a first resistor; a fourth resistor port connected to the third resistor port via a fourth inductor and to the second resistor port via a second resistor; a third signal port connected to the third resistor port via a fifth inductor; and a fourth signal port connected to the fourth resistor port via a sixth inductor.

公开(公告)号：US20220182064A1

公开(公告)日：2022-06-09

申请号：US17115570

申请日：2020-12-08

Applicant: Cisco Technology, Inc.

Inventor： Yongxin LI ,  Romesh Kumar NANDWANA ,  Kadaba LAKSHMIKUMAR

IPC: H03M1/06 ,  H03L7/197 ,  H03L7/081

Abstract: An apparatus includes a first digital-to-time converter (DTC) and a second DTC. The first DTC includes a sequence of delay stages. Each of the delay stages adds a delay to an input signal based on a control signal. Each delay stage includes a comparator and a capacitor coupled to an input of the comparator and to ground. The second DTC is coupled in parallel to the first DTC. The second DTC adds a delay to the input signal based on a complement of the control signal.