公开(公告)号：US10929310B2

公开(公告)日：2021-02-23

申请号：US16290101

申请日：2019-03-01

Applicant: Cisco Technology, Inc.

Inventor： Sagar Borikar ,  Ravikiran Kaidala Lakshman

IPC: G06F12/1081 ,  G06F12/12 ,  G06F13/12

Abstract: Systems and methods provide for optimizing utilization of an Address Translation Cache (ATC). A network interface controller (NIC) can write information reserving one or more cache lines in a first level of the ATC to a second level of the ATC. The NIC can receive a request for a direct memory access (DMA) to an untranslated address in memory of a host computing system. The NIC can determine that the untranslated address is not cached in the first level of the ATC. The NIC can identify a selected cache line in the first level of the ATC to evict using the request and the second level of the ATC. The NIC can receive a translated address for the untranslated address. The NIC can cache the untranslated address in the selected cache line. The NIC can perform the DMA using the translated address.

公开(公告)号：US20210182212A1

公开(公告)日：2021-06-17

申请号：US17170460

申请日：2021-02-08

Applicant: Cisco Technology, Inc.

Inventor： Sagar Borikar ,  Ravikiran Kaidala Lakshman

IPC: G06F12/1081 ,  G06F12/12 ,  G06F13/12

Abstract: Systems and methods provide for optimizing utilization of an Address Translation Cache (ATC). A network interface controller (NIC) can write information reserving one or more cache lines in a first level of the ATC to a second level of the ATC. The NIC can receive a request for a direct memory access (DMA) to an untranslated address in memory of a host computing system. The NIC can determine that the untranslated address is not cached in the first level of the ATC. The NIC can identify a selected cache line in the first level of the ATC to evict using the request and the second level of the ATC. The NIC can receive a translated address for the untranslated address. The NIC can cache the untranslated address in the selected cache line. The NIC can perform the DMA using the translated address.

公开(公告)号：US11625335B2

公开(公告)日：2023-04-11

申请号：US17170460

申请日：2021-02-08

Applicant: Cisco Technology, Inc.

Inventor： Sagar Borikar ,  Ravikiran Kaidala Lakshman

IPC: G06F12/1081 ,  G06F12/12 ,  G06F13/12

Abstract: Systems and methods provide for optimizing utilization of an Address Translation Cache (ATC). A network interface controller (NIC) can write information reserving one or more cache lines in a first level of the ATC to a second level of the ATC. The NIC can receive a request for a direct memory access (DMA) to an untranslated address in memory of a host computing system. The NIC can determine that the untranslated address is not cached in the first level of the ATC. The NIC can identify a selected cache line in the first level of the ATC to evict using the request and the second level of the ATC. The NIC can receive a translated address for the untranslated address. The NIC can cache the untranslated address in the selected cache line. The NIC can perform the DMA using the translated address.

公开(公告)号：US10958597B2

公开(公告)日：2021-03-23

申请号：US16284900

申请日：2019-02-25

Applicant: Cisco Technology, Inc.

Inventor： Tanjore K Suresh ,  Ravikiran Kaidala Lakshman ,  Deepak Srinivas Mayya

IPC: H04L12/861 ,  H04L12/939 ,  H04L12/863

Abstract: The disclosed technology relates to a process for general-purpose ring buffer handling in a network controller. Specifically, general purpose ring buffers are used in software queue on both the host domain and the network controller to carry out user-defined protocols. The protocols define the relationship of the ring buffers in the host domain and the network controller domain (e.g. how data is moved and processed). The protocols minimize interruptions to the network controller. Furthermore, the implementation of ring buffers in the network controller domain also provides additional resources to the host domain for carrying out the user-defined protocols.

公开(公告)号：US20200320017A1

公开(公告)日：2020-10-08

申请号：US16374952

申请日：2019-04-04

Applicant: Cisco Technology, Inc.

Inventor： Ravikiran Kaidala Lakshman ,  Tanjore K. Suresh ,  Deepak Srinivas Mayya ,  Sagar Borikar

IPC: G06F12/1081 ,  H04L12/861 ,  G06F12/1036 ,  H04L12/879

Abstract: Presented herein are techniques enable existing hardware input/output resources, such as the hardware queues (queue control registers), of a network interface card to be shared with different hosts (i.e., each queue mapped to many hosts) by logically segregating the hardware I/O resources using assignable interfaces each associated with a distinct Process Address Space Identifier (PASID). That is, different assignable interfaces are created and associated with different PASIDs, and these assignable interfaces each correspond to a different host (i.e., there is a mapping between a host, an assignable interface, a PASID, and a partition of a hardware queue). The result is that that the hosts can use the assignable interface to directly access the hardware queue partition that corresponds thereto.

公开(公告)号：US11036649B2

公开(公告)日：2021-06-15

申请号：US16374952

申请日：2019-04-04

Applicant: Cisco Technology, Inc.

Inventor： Ravikiran Kaidala Lakshman ,  Tanjore K. Suresh ,  Deepak Srinivas Mayya ,  Sagar Borikar

IPC: G06F12/1081 ,  H04L12/879 ,  G06F12/1036 ,  H04L12/861

Abstract: Presented herein are techniques enable existing hardware input/output resources, such as the hardware queues (queue control registers), of a network interface card to be shared with different hosts (i.e., each queue mapped to many hosts) by logically segregating the hardware I/O resources using assignable interfaces each associated with a distinct Process Address Space Identifier (PASID). That is, different assignable interfaces are created and associated with different PASIDs, and these assignable interfaces each correspond to a different host (i.e., there is a mapping between a host, an assignable interface, a PASID, and a partition of a hardware queue). The result is that that the hosts can use the assignable interface to directly access the hardware queue partition that corresponds thereto.

公开(公告)号：US10908841B2

公开(公告)日：2021-02-02

申请号：US16139264

申请日：2018-09-24

Applicant: Cisco Technology, Inc.

Inventor： Ravikiran Kaidala Lakshman ,  Deepak Srinivas Mayya ,  Tanjore K. Suresh ,  David S. Walker ,  Sagar Borikar ,  Shrikant Vaidya

IPC: G06F3/06 ,  G06F15/173 ,  H04L29/06

Abstract: Presented herein are methodologies for increasing effective throughput on a network. A method includes receiving a command request via a communication bus, the command request including a command ID, determining, based on the command ID, whether data in the command request is to be joined with data from other command requests having the same command ID, when it is determined, based on the command ID, that the data in the command request is to be joined with other data from other command requests having the same command ID, writing the data to a selected buffer in which the other data is already stored, and causing the data and the other data in the buffer to be sent as a payload of a single packet across a communications fabric.

公开(公告)号：US20200278935A1

公开(公告)日：2020-09-03

申请号：US16290101

申请日：2019-03-01

Applicant: Cisco Technology, Inc.

Inventor： Sagar Borikar ,  Ravikiran Kaidala Lakshman

IPC: G06F12/1081 ,  G06F12/12 ,  G06F13/12

Abstract: Systems and methods provide for optimizing utilization of an Address Translation Cache (ATC). A network interface controller (NIC) can write information reserving one or more cache lines in a first level of the ATC to a second level of the ATC. The NIC can receive a request for a direct memory access (DMA) to an untranslated address in memory of a host computing system. The NIC can determine that the untranslated address is not cached in the first level of the ATC. The NIC can identify a selected cache line in the first level of the ATC to evict using the request and the second level of the ATC. The NIC can receive a translated address for the untranslated address. The NIC can cache the untranslated address in the selected cache line. The NIC can perform the DMA using the translated address.

公开(公告)号：US20200274829A1

公开(公告)日：2020-08-27

申请号：US16284900

申请日：2019-02-25

Applicant: Cisco Technology, Inc.

Inventor： Tanjore K Suresh ,  Ravikiran Kaidala Lakshman ,  Deepak Srinivas Mayya

IPC: H04L12/861 ,  H04L12/863 ,  H04L12/939

Abstract: The disclosed technology relates to a process for general-purpose ring buffer handling in a network controller. Specifically, general purpose ring buffers are used in software queue on both the host domain and the network controller to carry out user-defined protocols. The protocols define the relationship of the ring buffers in the host domain and the network controller domain (e.g. how data is moved and processed). The protocols minimize interruptions to the network controller. Furthermore, the implementation of ring buffers in the network controller domain also provides additional resources to the host domain for carrying out the user-defined protocols.

公开(公告)号：US20200097212A1

公开(公告)日：2020-03-26

申请号：US16139264

申请日：2018-09-24

Applicant: Cisco Technology, Inc.

Inventor： Ravikiran Kaidala Lakshman ,  Deepak Srinivas Mayya ,  Tanjore K. Suresh ,  David S. Walker ,  Sagar Borikar ,  Shrikant Vaidya

IPC: G06F3/06 ,  G06F15/173 ,  H04L29/06

Abstract: Presented herein are methodologies for increasing effective throughput on a network. A method includes receiving a command request via a communication bus, the command request including a command ID, determining, based on the command ID, whether data in the command request is to be joined with data from other command requests having the same command ID, when it is determined, based on the command ID, that the data in the command request is to be joined with other data from other command requests having the same command ID, writing the data to a selected buffer in which the other data is already stored, and causing the data and the other data in the buffer to be sent as a payload of a single packet across a communications fabric.