PATTERNING METHOD FOR PREPARING TOP-GATE, BOTTOM-CONTACT ORGANIC FIELD EFFECT TRANSISTORS

    公开(公告)号:US20220293873A1

    公开(公告)日:2022-09-15

    申请号:US17672621

    申请日:2022-02-15

    Applicant: Clap Co., Ltd.

    Abstract: The present invention relates to a process for the preparation of a top-gate, bottom-contact organic field effect transistor on a substrate, which organic field effect transistor comprises source and drain electrodes, a semiconducting layer, a cured first dielectric layer and a gate electrode, and which process comprises the steps of: i) applying a composition comprising an organic semiconducting material to form the semiconducting layer, ii) applying a composition comprising a first dielectric material and a crosslinking agent carrying at least two azide groups to form a first dielectric layer, iii) curing portions of the first dielectric layer by light treatment, iv) removing the uncured portions of the first dielectric layer, and v) removing the portions of the semiconducting layer that are not covered by the cured first dielectric layer, wherein the first dielectric material comprises a star-shaped polymer consisting of at least one polymer block A and at least two polymer blocks B, wherein each polymer block B is attached to the polymer block A, and wherein at least 60 mol % of the repeat units of polymer block B are selected from the group consisting of Formulas (1A), (1B), (1C), (1D), (1E) and (1F), wherein R1, R2, R3, R4, R5, R6, R7 and R8 are independently and at each occurrence H or C1-C10-alkyl.

    PATTERNING METHOD FOR PREPARING TOP-GATE, BOTTOM-CONTACT ORGANIC FIELD EFFECT TRANSISTORS

    公开(公告)号:US20210036248A1

    公开(公告)日:2021-02-04

    申请号:US16978659

    申请日:2019-02-27

    Applicant: Clap Co., Ltd.

    Abstract: The present invention relates to a process for the preparation of a top-gate, bottom-contact organic field effect transistor on a substrate, which organic field effect transistor comprises source and drain electrodes, a semiconducting layer, a cured first dielectric layer and a gate electrode, and which process comprises the steps of: i) applying a composition comprising an organic semiconducting material to form the semiconducting layer, ii) applying a composition comprising a first dielectric material and a crosslinking agent carrying at least two azide groups to form a first dielectric layer, iii) curing portions of the first dielectric layer by light treatment, iv) removing the uncured portions of the first dielectric layer, and v) removing the portions of the semiconducting layer that are not covered by the cured first dielectric layer, wherein the first dielectric material comprises a star-shaped polymer consisting of at least one polymer block A and at least two polymer blocks B, wherein each polymer block B is attached to the polymer block A, and wherein at least 60 mol % of
    the repeat units of polymer block B are selected from the group consisting of Formulas (1A), (1B), (1C), (1D), (1E) and (1F), wherein R1, R2, R3, R4, R5, R6, R7 and R8 are independently and at each occurrence H or C1-C10-alkyl.

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