Accelerated simulation and verification of a system under test (SUT) using cache and replacement management tables
    1.
    发明授权
    Accelerated simulation and verification of a system under test (SUT) using cache and replacement management tables 有权
    使用缓存和替换管理表加速对被测系统(SUT)的仿真和验证

    公开(公告)号:US07756695B2

    公开(公告)日:2010-07-13

    申请号:US11464122

    申请日:2006-08-11

    IPC分类号: G06F17/50 G06F9/455

    CPC分类号: G06F17/5027

    摘要: A cache replacement system for extending the debugging capabilities of accelerated simulation by enabling enhanced cache data and state checking is provided. The system includes a Cell Broadband Engine Architecture (CBEA) compliant system implementing Replacement Management Tables in an accelerated simulation environment. The RMTs control cache replacement and allow the software to direct entries with specific address ranges at a particular subset of the cache. The RMTs further allow for locking data in the cache and are utilized to prevent overwriting data in the cache by directing data that is known to be used only once at a particular set. Using the locking mechanism in an accelerated simulation environment, a user is able to run code sets, which, when the microprocessor system being tested is correctly designed, generates identical and verifiable data and cache states in each of the different sets of the cache.

    摘要翻译: 提供了一种缓存替换系统,用于通过启用增强的缓存数据和状态检查来扩展加速仿真的调试功能。 该系统包括在加速模拟环境中实施替换管理表的Cell Broadband Engine Architecture(CBEA)兼容系统。 RMT控制高速缓存替换,并允许软件在缓存的特定子集处指定具有特定地址范围的条目。 RMT还允许在高速缓存中锁定数据,并且用于通过指导已知在特定集合中仅使用一次的数据来防止重写高速缓存中的数据。 在加速模拟环境中使用锁定机制,用户能够运行代码集,当正确设计被测试的微处理器系统时,可以在每个不同的高速缓存集中的每一个中生成相同和可验证的数据和高速缓存状态。

    ACCELERATED SIMULATION AND VERIFICATION OF A SYSTEM UNDER TEST (SUT) USING CACHE AND REPLACEMENT MANAGEMENT TABLES
    2.
    发明申请
    ACCELERATED SIMULATION AND VERIFICATION OF A SYSTEM UNDER TEST (SUT) USING CACHE AND REPLACEMENT MANAGEMENT TABLES 有权
    使用高速缓存和替换管理表进行测试(SUT)的系统的加速模拟和验证

    公开(公告)号:US20080126068A1

    公开(公告)日:2008-05-29

    申请号:US11464122

    申请日:2006-08-11

    IPC分类号: G06F9/455

    CPC分类号: G06F17/5027

    摘要: A cache replacement system for extending the debugging capabilities of accelerated simulation by enabling enhanced cache data and state checking is provided. The system includes a Cell Broadband Engine Architecture (CBEA) compliant system implementing Replacement Management Tables in an accelerated simulation environment. The RMTs control cache replacement and allow the software to direct entries with specific address ranges at a particular subset of the cache. The RMTs further allow for locking data in the cache and are utilized to prevent overwriting data in the cache by directing data that is known to be used only once at a particular set. Using the locking mechanism in an accelerated simulation environment, a user is able to run code sets, which, when the microprocessor system being tested is correctly designed, generates identical and verifiable data and cache states in each of the different sets of the cache.

    摘要翻译: 提供了一种缓存替换系统,用于通过启用增强的缓存数据和状态检查来扩展加速仿真的调试功能。 该系统包括在加速模拟环境中实施替换管理表的Cell Broadband Engine Architecture(CBEA)兼容系统。 RMT控制高速缓存替换,并允许软件在缓存的特定子集处指定具有特定地址范围的条目。 RMT还允许在高速缓存中锁定数据,并且用于通过指导已知在特定集合中仅使用一次的数据来防止重写高速缓存中的数据。 在加速模拟环境中使用锁定机制,用户能够运行代码集,当正确设计被测试的微处理器系统时,可以在每个不同的高速缓存集中的每一个中生成相同和可验证的数据和高速缓存状态。

    Secure Boot Across a Plurality of Processors
    3.
    发明申请
    Secure Boot Across a Plurality of Processors 失效
    跨多个处理器的安全引导

    公开(公告)号:US20080229092A1

    公开(公告)日:2008-09-18

    申请号:US12130185

    申请日:2008-05-30

    IPC分类号: G06F9/00

    摘要: Boot code is partitioned into a plurality of boot code partitions. Processors of a multiprocessor system are selected to be boot processors and are each provided with a boot code partition to execute in a predetermined boot code sequence. Each processor executes its boot code partition in accordance with the boot code sequence and signals to a next processor the successful and uncompromised execution of its boot code partition. If any of the processors does not signal successful completion and/or uncompromised execution of its boot code partition, the boot operation fails. The processors may be arranged, with regard to the boot operation, in a daisy chain, ring, or master/slave arrangement, for example.

    摘要翻译: 引导代码被分割成多个引导代码分区。 多处理器系统的处理器被选择为引导处理器,并且每个具有引导代码分区以在预定引导代码序列中执行。 每个处理器根据引导代码序列执行其引导代码分区,并向下一个处理器发送其启动代码分区的成功和不妥协的执行信号。 如果处理器中的任何一个没有显示其启动代码分区的成功完成和/或不妥协的执行,则引导操作失败。 例如,处理器可以针对引导操作被布置在菊花链,环形或主/从装置中。

    Selecting a random processor to boot on a multiprocessor system
    4.
    发明授权
    Selecting a random processor to boot on a multiprocessor system 失效
    选择随机处理器以在多处理器系统上引导

    公开(公告)号:US08037293B2

    公开(公告)日:2011-10-11

    申请号:US12130128

    申请日:2008-05-30

    IPC分类号: G06F9/00 G06F15/177

    CPC分类号: G06F21/575 G06F9/4416

    摘要: Pervasive logic is provided that includes a random event generator. The random event generator randomly selects which processor of a plurality of processors in the multiprocessor system is to be a boot processor for the multiprocessor system. A corresponding configuration bit for the randomly selected processor is set to identify the processor as a boot processor. Based on the setting of the configuration bits for each processor in the plurality of processors, a selection of a security key is made. The security key is then used to decrypt the boot code for booting the multiprocessor system. Only the randomly selected boot processor is able to select the correct security key for correctly decrypting the boot code, which it then executes to bring the system to an operational state.

    摘要翻译: 提供包括随机事件发生器的普遍逻辑。 随机事件发生器随机选择多处理器系统中的多个处理器的哪个处理器是多处理器系统的引导处理器。 设置用于随机选择的处理器的相应配置位以将处理器识别为引导处理器。 基于多个处理器中的每个处理器的配置位的设置,进行安全密钥的选择。 然后,安全密钥用于解密引导代码以引导多处理器系统。 只有随机选择的引导处理器能够选择正确解密引导代码的正确的安全密钥,然后执行该引导代码才能使系统处于运行状态。

    SYSTEM AND METHOD FOR SECURE BOOT ACROSS A PLURALITY OF PROCESSORS
    5.
    发明申请
    SYSTEM AND METHOD FOR SECURE BOOT ACROSS A PLURALITY OF PROCESSORS 审中-公开
    一系列处理器安全引导的系统和方法

    公开(公告)号:US20070288740A1

    公开(公告)日:2007-12-13

    申请号:US11423342

    申请日:2006-06-09

    IPC分类号: G06F9/00

    摘要: A system and method for secure boot across a plurality of processors are provided. With the system and method, boot code is partitioned into a plurality of boot code partitions. Processors of a multiprocessor system are selected to be boot processors and are each provided with a boot code partition to execute in a predetermined boot code sequence. Each processor executes its boot code partition in accordance with the boot code sequence and signals to a next processor the successful and uncompromised execution of its boot code partition. If any of the processors does not signal successful completion and/or uncompromised execution of its boot code partition, the boot operation fails. The processors may be arranged, with regard to the boot operation, in a daisy chain, ring, or master/slave arrangement, for example.

    摘要翻译: 提供了一种用于跨多个处理器的安全引导的系统和方法。 使用系统和方法,引导代码被分割成多个引导代码分区。 多处理器系统的处理器被选择为引导处理器,并且每个具有引导代码分区以在预定引导代码序列中执行。 每个处理器根据引导代码序列执行其引导代码分区,并向下一个处理器发送其启动代码分区的成功和不妥协的执行信号。 如果处理器中的任何一个没有显示其启动代码分区的成功完成和/或不妥协的执行,则引导操作失败。 例如,处理器可以针对引导操作被布置在菊花链,环形或主/从装置中。

    Secure boot across a plurality of processors
    6.
    发明授权
    Secure boot across a plurality of processors 失效
    通过多个处理器进行安全启动

    公开(公告)号:US08046574B2

    公开(公告)日:2011-10-25

    申请号:US12130185

    申请日:2008-05-30

    IPC分类号: G06F9/00 G06F15/177

    摘要: Boot code is partitioned into a plurality of boot code partitions. Processors of a multiprocessor system are selected to be boot processors and are each provided with a boot code partition to execute in a predetermined boot code sequence. Each processor executes its boot code partition in accordance with the boot code sequence and signals to a next processor the successful and uncompromised execution of its boot code partition. If any of the processors does not signal successful completion and/or uncompromised execution of its boot code partition, the boot operation fails. The processors may be arranged, with regard to the boot operation, in a daisy chain, ring, or master/slave arrangement, for example.

    摘要翻译: 引导代码被分割成多个引导代码分区。 多处理器系统的处理器被选择为引导处理器,并且每个具有引导代码分区以在预定引导代码序列中执行。 每个处理器根据引导代码序列执行其引导代码分区,并向下一个处理器发送其启动代码分区的成功和不妥协的执行信号。 如果处理器中的任何一个没有显示其启动代码分区的成功完成和/或不妥协的执行,则引导操作失败。 例如,处理器可以针对引导操作被布置在菊花链,环形或主/从装置中。

    Booting a multiprocessor device based on selection of encryption keys to be provided to processors
    7.
    发明授权
    Booting a multiprocessor device based on selection of encryption keys to be provided to processors 失效
    基于要提供给处理器的加密密钥的选择来引导多处理器设备

    公开(公告)号:US07779273B2

    公开(公告)日:2010-08-17

    申请号:US12120808

    申请日:2008-05-15

    IPC分类号: G06F21/00

    摘要: A mechanism is provided for booting a multiprocessor device based on selection of encryption keys to be provided to the processors. With the mechanism, a security key and one or more randomly generated key values are provided to a selector mechanism of each processor of the multiprocessor device. A random selection mechanism is provided in pervasive logic that randomly selects one of the processors to be a boot processor and thereby, provides a select signal to the selector of the boot processor such that the boot processor selects the security key. All other processors select one of the one or more randomly generated key values. As a result, only the randomly selected boot processor is able to use the proper security key to decrypt the boot code for execution.

    摘要翻译: 提供了一种用于基于要提供给处理器的加密密钥的选择来引导多处理器设备的机制。 利用该机制,将安全密钥和一个或多个随机生成的密钥值提供给多处理器设备的每个处理器的选择器机构。 随机选择机制以普遍的逻辑提供,其随机地将处理器中的一个随机选择为引导处理器,从而向引导处理器的选择器提供选择信号,使得引导处理器选择安全密钥。 所有其他处理器选择一个或多个随机生成的键值中的一个。 结果,只有随机选择的引导处理器能够使用适当的安全密钥来解密引导代码才能执行。

    Selecting a Random Processor to Boot on a Multiprocessor System
    8.
    发明申请
    Selecting a Random Processor to Boot on a Multiprocessor System 失效
    选择随机处理器在多处理器系统上引导

    公开(公告)号:US20090327680A1

    公开(公告)日:2009-12-31

    申请号:US12130128

    申请日:2008-05-30

    IPC分类号: G06F15/177

    CPC分类号: G06F21/575 G06F9/4416

    摘要: Pervasive logic is provided that includes a random event generator. The random event generator randomly selects which processor of a plurality of processors in the multiprocessor system is to be a boot processor for the multiprocessor system. A corresponding configuration bit for the randomly selected processor is set to identify the processor as a boot processor. Based on the setting of the configuration bits for each processor in the plurality of processors, a selection of a security key is made. The security key is then used to decrypt the boot code for booting the multiprocessor system. Only the randomly selected boot processor is able to select the correct security key for correctly decrypting the boot code, which it then executes to bring the system to an operational state.

    摘要翻译: 提供包括随机事件发生器的普遍逻辑。 随机事件发生器随机选择多处理器系统中的多个处理器的哪个处理器是多处理器系统的引导处理器。 设置用于随机选择的处理器的相应配置位以将处理器识别为引导处理器。 基于多个处理器中的每个处理器的配置位的设置,进行安全密钥的选择。 然后,安全密钥用于解密引导代码以引导多处理器系统。 只有随机选择的引导处理器能够选择正确解密引导代码的正确的安全密钥,然后执行该引导代码才能使系统处于运行状态。

    System and Method for Booting a Multiprocessor Device Based on Selection of Encryption Keys to be Provided to Processors
    9.
    发明申请
    System and Method for Booting a Multiprocessor Device Based on Selection of Encryption Keys to be Provided to Processors 失效
    基于提供给处理器的加密密钥的选择来引导多处理器设备的系统和方法

    公开(公告)号:US20080256366A1

    公开(公告)日:2008-10-16

    申请号:US12120808

    申请日:2008-05-15

    IPC分类号: G06F12/14

    摘要: A system and method for booting a multiprocessor device based on selection of encryption keys to be provided to the processors are provided. With the system and method, a security key and one or more randomly generated key values are provided to a selector mechanism of each processor of the multiprocessor device. A random selection mechanism is provided in pervasive logic that randomly selects one of the processors to be a boot processor and thereby, provides a select signal to the selector of the boot processor such that the boot processor selects the security key. All other processors select one of the one or more randomly generated key values. As a result, only the randomly selected boot processor is able to use the proper security key to decrypt the boot code for execution.

    摘要翻译: 提供了一种用于基于要提供给处理器的加密密钥的选择来引导多处理器设备的系统和方法。 利用系统和方法,将一个安全密钥和一个或多个随机生成的密钥值提供给多处理器设备的每个处理器的选择器机构。 随机选择机制以普遍的逻辑提供,其随机地将处理器中的一个随机选择为引导处理器,从而向引导处理器的选择器提供选择信号,使得引导处理器选择安全密钥。 所有其他处理器选择一个或多个随机生成的键值中的一个。 结果,只有随机选择的引导处理器能够使用适当的安全密钥来解密引导代码才能执行。

    SYSTEM AND METHOD FOR SELECTING A RANDOM PROCESSOR TO BOOT ON A MULTIPROCESSOR SYSTEM
    10.
    发明申请
    SYSTEM AND METHOD FOR SELECTING A RANDOM PROCESSOR TO BOOT ON A MULTIPROCESSOR SYSTEM 审中-公开
    选择随机处理器引导多处理器系统的系统和方法

    公开(公告)号:US20070288738A1

    公开(公告)日:2007-12-13

    申请号:US11423320

    申请日:2006-06-09

    IPC分类号: G06F15/177

    CPC分类号: G06F21/575 G06F9/4416

    摘要: A system and method for masking a boot sequence by providing a dummy processor are provided. With the system and method, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The execution of the masking code on the non-boot processors preferably generates electromagnetic and/or thermal signatures that approximate the signatures of the actual boot code execution on the boot processor. One of the non-boot processors is selected to execute masking code that is different from the other masking code sequence to thereby generate a electromagnetic and/or thermal signature that appears to be unique from an external monitoring perspective.

    摘要翻译: 提供了一种通过提供虚拟处理器来掩蔽引导序列的系统和方法。 使用系统和方法,多处理器系统的处理器之一被选择为引导处理器。 多处理器系统的其他处理器执行掩蔽代码,其产生屏蔽实际引导处理器的电磁和/或热特征的电磁和/或热特征。 非启动处理器上的屏蔽码的执行优选地产生近似发动机处理器上的实际启动代码执行的签名的电磁和/或热签名。 选择非引导处理器之一来执行不同于其它掩码代码序列的掩码,从而从外部监视的角度生成似乎是唯一的电磁和/或热签名。