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公开(公告)号：US07774617B2
公开(公告)日：2010-08-10
申请号：US12120847
申请日：2008-05-15
IPC分类号： G06F21/00
CPC分类号： G06F9/4406 , G06F21/575 , G06F21/75 , G06F21/755 , H04L9/08 , H04L2209/04 , H04L2209/08
摘要： A mechanism is provided for masking a boot sequence by providing a dummy processor. With the mechanism, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The execution of the masking code on the non-boot processors preferably generates electromagnetic and/or thermal signatures that approximate the signatures of the actual boot code execution on the boot processor. One of the non-boot processors is selected to execute masking code that is different from the other masking code sequence to thereby generate a electromagnetic and/or thermal signature that appears to be unique from an external monitoring perspective.
摘要翻译： 提供了一种用于通过提供虚拟处理器来掩蔽引导序列的机制。 使用该机制，多处理器系统的处理器之一被选择为引导处理器。 多处理器系统的其他处理器执行掩蔽代码，其产生屏蔽实际引导处理器的电磁和/或热特征的电磁和/或热特征。 非启动处理器上的屏蔽码的执行优选地产生近似发动机处理器上的实际启动代码执行的签名的电磁和/或热签名。 选择非引导处理器之一来执行不同于其它掩码代码序列的掩码，从而从外部监视的角度生成似乎是唯一的电磁和/或热签名。
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2.发明申请System and Method for Masking a Boot Sequence by Providing a Dummy Processor 失效通过提供一个虚拟处理器来屏蔽引导序列的系统和方法公开(公告)号：US20080215874A1
公开(公告)日：2008-09-04
申请号：US12120847
申请日：2008-05-15
IPC分类号： G06F15/177
CPC分类号： G06F9/4406 , G06F21/575 , G06F21/75 , G06F21/755 , H04L9/08 , H04L2209/04 , H04L2209/08
摘要： A system and method for masking a boot sequence by providing a dummy processor are provided. With the system and method, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The execution of the masking code on the non-boot processors preferably generates electromagnetic and/or thermal signatures that approximate the signatures of the actual boot code execution on the boot processor. One of the non-boot processors is selected to execute masking code that is different from the other masking code sequence to thereby generate a electromagnetic and/or thermal signature that appears to be unique from an external monitoring perspective.
摘要翻译： 提供了一种通过提供虚拟处理器来掩蔽引导序列的系统和方法。 使用系统和方法，多处理器系统的处理器之一被选择为引导处理器。 多处理器系统的其他处理器执行掩蔽代码，其产生屏蔽实际引导处理器的电磁和/或热特征的电磁和/或热特征。 非启动处理器上的屏蔽码的执行优选地产生近似发动机处理器上的实际启动代码执行的签名的电磁和/或热签名。 选择非引导处理器之一来执行不同于其它掩码代码序列的掩码，从而从外部监视的角度生成似乎是唯一的电磁和/或热签名。
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3.发明申请SYSTEM AND METHOD FOR BOOTING A MULTIPROCESSOR DEVICE BASED ON SELECTION OF ENCRYPTION KEYS TO BE PROVIDED TO PROCESSORS 审中-公开用于根据提供给处理器的加密键的选择来触发多处理器设备的系统和方法公开(公告)号：US20070288761A1
公开(公告)日：2007-12-13
申请号：US11423304
申请日：2006-06-09
IPC分类号： G06F12/14
CPC分类号： G06F15/177 , G06F9/4405 , G06F21/575 , G06F2221/2123 , H04L9/0662 , H04L9/14 , H04L2209/04 , H04L2209/08
摘要： A system and method for booting a multiprocessor device based on selection of encryption keys to be provided to the processors are provided. With the system and method, a security key and one or more randomly generated key values are provided to a selector mechanism of each processor of the multiprocessor device. A random selection mechanism is provided in pervasive logic that randomly selects one of the processors to be a boot processor and thereby, provides a select signal to the selector of the boot processor such that the boot processor selects the security key. All other processors select one of the one or more randomly generated key values. As a result, only the randomly selected boot processor is able to use the proper security key to decrypt the boot code for execution.
摘要翻译： 提供了一种用于基于要提供给处理器的加密密钥的选择来引导多处理器设备的系统和方法。 利用系统和方法，将一个安全密钥和一个或多个随机生成的密钥值提供给多处理器设备的每个处理器的选择器机构。 随机选择机制以普遍的逻辑提供，其随机地将处理器中的一个随机选择为引导处理器，从而向引导处理器的选择器提供选择信号，使得引导处理器选择安全密钥。 所有其他处理器选择一个或多个随机生成的键值中的一个。 结果，只有随机选择的引导处理器能够使用适当的安全密钥来解密引导代码才能执行。
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4.发明申请SYSTEM AND METHOD FOR MASKING A BOOT SEQUENCE BY RUNNING DIFFERENT CODE ON EACH PROCESSOR 审中-公开通过在每个处理器上运行不同代码来屏蔽引导序列的系统和方法公开(公告)号：US20070288739A1
公开(公告)日：2007-12-13
申请号：US11423330
申请日：2006-06-09
IPC分类号： G06F15/177
CPC分类号： G06F9/4401 , G06F9/4405 , G06F21/556 , G06F21/575 , G06F2221/2123
摘要： A system and method for masking a boot sequence by running different code on each processor of a multiprocessor system are provided. With the system and method, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The masking code executed by each of the non-boot processors may be different from each other and may be randomly selected from a plurality of masking code sequences stored in a masking code storage device. Each execution of masking code on each of the non-boot processors may generate a different electromagnetic and/or thermal signature such that none of the processors appear to be unique from an external monitoring perspective.
摘要翻译： 提供了一种通过在多处理器系统的每个处理器上运行不同代码来屏蔽引导序列的系统和方法。 使用系统和方法，多处理器系统的处理器之一被选择为引导处理器。 多处理器系统的其他处理器执行掩蔽代码，其产生屏蔽实际引导处理器的电磁和/或热特征的电磁和/或热特征。 由每个非引导处理器执行的掩蔽码可以彼此不同，并且可以从存储在掩码代码存储设备中的多个掩码代码序列中随机选择。 每个非引导处理器上的每个执行屏蔽代码可以产生不同的电磁和/或热签名，使得所有处理器都不会从外部监视角度看起来是唯一的。
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公开(公告)号：US20100250943A1
公开(公告)日：2010-09-30
申请号：US12413016
申请日：2009-03-27
CPC分类号： H04L9/32 , G06F21/75 , H04L2209/34 , H04L2209/56
摘要： A method for electronically fused encryption key security includes inserting a plurality of inverters between a bank of security fuses and a fuse sense logic module. The method also includes sensing an activated set of the bank of security fuses and the plurality of inverters. The method further includes comparing the sensed activated set of the bank of security fuses and the plurality of inverters with a software key to determine whether at least a substantial match is made.
摘要翻译： 一种用于电子融合加密密钥安全性的方法包括在安全保险丝组和熔丝检测逻辑模块之间插入多个逆变器。 该方法还包括感测安全熔断器组和多个逆变器的激活组。 该方法还包括将感测到的安全熔断器组和多个逆变器的激活组与软件密钥进行比较，以确定是否至少进行了实质的匹配。
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公开(公告)号：US07739573B2
公开(公告)日：2010-06-15
申请号：US11621766
申请日：2007-01-10
申请人： Jonathan J. DeMent , Sang H. Dhong , Gilles Gervais , Alain Loiseau , Kirk D. Peterson , John L. Sinchak
发明人： Jonathan J. DeMent , Sang H. Dhong , Gilles Gervais , Alain Loiseau , Kirk D. Peterson , John L. Sinchak
IPC分类号： G01R31/30
CPC分类号： G01R31/3004 , G01R31/31721 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： A voltage identifier (VID) sorting system is provided that optimizes processor power and operating voltage guardband at a constant processor frequency. The VID sorting system determines a voltage versus current curve for the processor. The VID sorting system then uses the voltage versus current characteristics to calculate the power for each VID to determine an acceptable range of VIDs within the maximum power criteria. The VID sorting system then tests VIDs in the range and selects a VID from the range to optimize for minimum power and/or maximum voltage guardband at a constant processor frequency.
摘要翻译： 提供了一种电压标识符（VID）分类系统，其以恒定的处理器频率优化处理器功率和工作电压保护带。 VID分选系统确定处理器的电压与电流曲线。 然后，VID分选系统使用电压与电流特性来计算每个VID的功率，以确定最大功率标准内的VID的可接受范围。 VID分类系统然后测试该范围内的VID，并从该范围中选择一个VID，以在恒定的处理器频率下对最小功率和/或最大电压保护带进行优化。
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7.发明申请System and Method for Generating a Worst Case Current Waveform for Testing of Integrated Circuit Devices 有权用于生成最差情况的系统和方法用于集成电路器件测试的电流波形公开(公告)号：US20090112550A1
公开(公告)日：2009-04-30
申请号：US11927840
申请日：2007-10-30
申请人： Makoto Aikawa , Jonathan J. DeMent , Sang H. Dhong , Brian K. Flachs , Gilles Gervais , Iwao Takiguchi , Tetsuji Tamura
发明人： Makoto Aikawa , Jonathan J. DeMent , Sang H. Dhong , Brian K. Flachs , Gilles Gervais , Iwao Takiguchi , Tetsuji Tamura
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G01R31/318364
摘要： A system and method for generating a worst case current waveform for testing of integrated circuit devices are provided. Architectural analysis of an integrated circuit device is first performed to determine an initial worst case power workload to be applied to the integrated circuit device. Thereafter, the derived worst case power workload is applied to a model and is simulated to generate a worst case current waveform that is input to an electrical model of the integrated circuit device to generate a worst case noise budget value. The worst case noise budget value is then compared to measured noise from application of the worst case power workload to a hardware implemented integrated circuit device. The worst case current waveform may be selected for future testing of integrated circuit devices or modifications to the simulation models may be performed and the process repeated based on the results of the comparison.
摘要翻译： 提供一种用于产生用于集成电路器件测试的最坏情况电流波形的系统和方法。 首先执行集成电路装置的结构分析，以确定要应用于集成电路装置的初始最坏情况功率工作负荷。 此后，将得到的最坏情况功率工作量应用于模型，并且被模拟以产生输入到集成电路器件的电气模型以产生最坏情况噪声预算值的最坏情况电流波形。 然后将最坏情况的噪声预算值与从最坏情况功率工作负载应用于硬件实现的集成电路设备的测量噪声进行比较。 可以选择最坏情况下的电流波形以用于集成电路设备的未来测试，或者可以对仿真模型进行修改，并且基于比较的结果重复该过程。
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公开(公告)号：US20080229092A1
公开(公告)日：2008-09-18
申请号：US12130185
申请日：2008-05-30
IPC分类号： G06F9/00
CPC分类号： G06F21/575 , G06F9/4405 , G06F15/177 , G06F21/755
摘要： Boot code is partitioned into a plurality of boot code partitions. Processors of a multiprocessor system are selected to be boot processors and are each provided with a boot code partition to execute in a predetermined boot code sequence. Each processor executes its boot code partition in accordance with the boot code sequence and signals to a next processor the successful and uncompromised execution of its boot code partition. If any of the processors does not signal successful completion and/or uncompromised execution of its boot code partition, the boot operation fails. The processors may be arranged, with regard to the boot operation, in a daisy chain, ring, or master/slave arrangement, for example.
摘要翻译： 引导代码被分割成多个引导代码分区。 多处理器系统的处理器被选择为引导处理器，并且每个具有引导代码分区以在预定引导代码序列中执行。 每个处理器根据引导代码序列执行其引导代码分区，并向下一个处理器发送其启动代码分区的成功和不妥协的执行信号。 如果处理器中的任何一个没有显示其启动代码分区的成功完成和/或不妥协的执行，则引导操作失败。 例如，处理器可以针对引导操作被布置在菊花链，环形或主/从装置中。
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公开(公告)号：US08230495B2
公开(公告)日：2012-07-24
申请号：US12413016
申请日：2009-03-27
IPC分类号： G06F21/00
CPC分类号： H04L9/32 , G06F21/75 , H04L2209/34 , H04L2209/56
摘要： A method for electronically fused encryption key security includes inserting a plurality of inverters between a bank of security fuses and a fuse sense logic module. The method also includes sensing an activated set of the bank of security fuses and the plurality of inverters. The method further includes comparing the sensed activated set of the bank of security fuses and the plurality of inverters with a software key to determine whether at least a substantial match is made.
摘要翻译： 一种用于电子融合加密密钥安全性的方法包括在安全保险丝组和熔丝检测逻辑模块之间插入多个逆变器。 该方法还包括感测安全熔断器组和多个逆变器的激活组。 该方法还包括将感测到的安全熔断器组和多个逆变器的激活组与软件密钥进行比较，以确定是否至少进行了实质的匹配。
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公开(公告)号：US08046574B2
公开(公告)日：2011-10-25
申请号：US12130185
申请日：2008-05-30
IPC分类号： G06F9/00 , G06F15/177
CPC分类号： G06F21/575 , G06F9/4405 , G06F15/177 , G06F21/755
摘要： Boot code is partitioned into a plurality of boot code partitions. Processors of a multiprocessor system are selected to be boot processors and are each provided with a boot code partition to execute in a predetermined boot code sequence. Each processor executes its boot code partition in accordance with the boot code sequence and signals to a next processor the successful and uncompromised execution of its boot code partition. If any of the processors does not signal successful completion and/or uncompromised execution of its boot code partition, the boot operation fails. The processors may be arranged, with regard to the boot operation, in a daisy chain, ring, or master/slave arrangement, for example.
摘要翻译： 引导代码被分割成多个引导代码分区。 多处理器系统的处理器被选择为引导处理器，并且每个具有引导代码分区以在预定引导代码序列中执行。 每个处理器根据引导代码序列执行其引导代码分区，并向下一个处理器发送其启动代码分区的成功和不妥协的执行信号。 如果处理器中的任何一个没有显示其启动代码分区的成功完成和/或不妥协的执行，则引导操作失败。 例如，处理器可以针对引导操作被布置在菊花链，环形或主/从装置中。
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