Scan based test design in serdes applications

    公开(公告)号:US11112459B2

    公开(公告)日:2021-09-07

    申请号:US16022989

    申请日:2018-06-29

    Abstract: A method for testing operation of a device under test (DUT) includes receiving an input bit stream at an input pin, the input bit stream including multiplexed test patterns for a plurality of scan chains of the DUT. The method further includes demultiplexing the multiplexed test patterns, and providing a corresponding test pattern data to each of the plurality of scan chains. The method further includes, at each of the plurality of scan chains, scanning test results from the scan chain, to produce multiplex output test data into an output bit stream.

    SCAN BASED TEST DESIGN IN SERDES APPLICATIONS

    公开(公告)号:US20180306862A1

    公开(公告)日:2018-10-25

    申请号:US16022989

    申请日:2018-06-29

    CPC classification number: G01R31/318563 G01R31/318544 G01R31/318572

    Abstract: A method for testing operation of a device under test (DUT) includes receiving an input bit stream at an input pin, the input bit stream including multiplexed test patterns for a plurality of scan chains of the DUT. The method further includes demultiplexing the multiplexed test patterns, and providing a corresponding test pattern data to each of the plurality of scan chains. The method further includes, at each of the plurality of scan chains, scanning test results from the scan chain, to produce multiplex output test data into an output bit stream.

Patent Agency Ranking