PROCESSOR RESOURCE AND EXECUTION PROTECTION METHODS AND APPARATUS
    1.
    发明申请
    PROCESSOR RESOURCE AND EXECUTION PROTECTION METHODS AND APPARATUS 有权
    加工者资源和执行保护方法和装置

    公开(公告)号:US20130326193A1

    公开(公告)日:2013-12-05

    申请号:US13485078

    申请日:2012-05-31

    IPC分类号: G06F9/30

    摘要: Embodiments include processing systems that determine, based on an instruction address range indicator stored in a first register, whether a next instruction fetch address corresponds to a location within a first memory region associated with a current privilege state or within a second memory region associated with a different privilege state. When the next instruction fetch address is not within the first memory region, the next instruction is allowed to be fetched only when a transition to the different privilege state is legal. In a further embodiment, when a data access address is generated for an instruction, a determination is made, based on a data address range indicator stored in a second register, whether access to a memory location corresponding to the data access address is allowed. The access is allowed when the current privilege state is a privilege state in which access to the memory location is allowed.

    摘要翻译: 实施例包括处理系统,其基于存储在第一寄存器中的指令地址范围指示符来确定下一个指令获取地址是否对应于与当前特权状态相关联的第一存储器区域内的位置或与第一存储器区域相关联的第二存储器区域内的位置 不同的特权状态。 当下一个指令提取地址不在第一个存储器区域内时,只有当向不同特权状态的转换合法时才允许该指令被取出。 在另一实施例中,当为指令生成数据访问地址时,基于存储在第二寄存器中的数据地址范围指示符,确定是否允许对对应于数据访问地址的存储器位置的访问。 当当前特权状态是允许访问内存位置的权限状态时,允许访问。