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公开(公告)号:US20090248911A1
公开(公告)日:2009-10-01
申请号:US12057146
申请日:2008-03-27
IPC分类号: G06F1/12
CPC分类号: G06F13/34 , G06F1/12 , G06F1/3203 , G06F1/324 , G06F1/3253 , G06F1/3287 , G06F13/1673 , G06F13/28 , Y02D10/126 , Y02D10/151 , Y02D10/171
摘要: A method and system is disclosed for accessing I/O and memory devices utilizing a DMA controller. Each device may be connected to the DMA controller through an individual channel. Clocking circuitry in the DMA may allow the DMA controller to send signals to each device at a prescribed frequency. Furthermore, the DMA controller is capable of activating and deactivating a channel clock, used in sending signals to the devices, based on the operational status of the individual devices. The DMA controller is also capable of tuning the channel clock dependant on the capabilities of any active devices. In this manner, the amount of bandwidth used during a DMA data transfer can be tailored to the specific requirements of the devices involved with the data transfer.
摘要翻译: 公开了一种利用DMA控制器访问I / O和存储器件的方法和系统。 每个设备可以通过单独的通道连接到DMA控制器。 DMA中的时钟电路可以允许DMA控制器以规定的频率向每个设备发送信号。 此外,DMA控制器能够基于各个设备的操作状态来激活和去激活用于向设备发送信号的通道时钟。 DMA控制器还能够根据任何有源器件的功能调整通道时钟。 以这种方式,DMA数据传输期间使用的带宽量可以根据与数据传输相关的设备的具体要求进行调整。