DEVELOPMENT SYSTEM AND METHOD OF OFFLINE SOFTWARE-IN-THE-LOOP SIMULATION

    公开(公告)号:US20230009172A1

    公开(公告)日:2023-01-12

    申请号:US17852149

    申请日:2022-06-28

    Abstract: A development system and a method of an offline software-in-the-loop simulation are disclosed. A common firmware architecture generates a chip control program. The common firmware architecture has an application layer and a hardware abstraction layer. The application layer has a configuration header file and a product program. A processing program required by a peripheral module is added to the hardware abstraction layer during compiling. The chip control program is provided to a controller chip or a circuit simulation software to be executed to control the product-related circuit through controlling the peripheral module.

    TOTEM-POLE POWER FACTOR CORRECTOR WITH ZERO-VOLTAGE SWITCHING

    公开(公告)号:US20240275274A1

    公开(公告)日:2024-08-15

    申请号:US18331832

    申请日:2023-06-08

    CPC classification number: H02M1/4225 H02M1/0058 H02M1/4241

    Abstract: A Totem-pole power factor corrector receives an input power source and convert the input power source into an output power source. The Totem-pole power factor corrector includes an input inductor, a fast-switching switch leg, a slow-switching switch leg, a resonant tank, and an output capacitor. The fast-switching switch leg includes a fast-switching upper switch and a fast-switching lower switch, and the fast-switching upper switch and the fast-switching lower switch are commonly coupled at a first middle node. The slow-switching switch leg is coupled in parallel to the fast-switching switch leg, and the slow-switching switch leg includes a slow-switching upper and a slow-switching lower switch. The resonant tank includes a resonant inductor and at least one resonant capacitor. A first end of the resonant inductor is coupled to the first middle node, and a second end of the resonant inductor is coupled to the at least one capacitor.

    PLANAR TRANSFORMER
    4.
    发明公开
    PLANAR TRANSFORMER 审中-公开

    公开(公告)号:US20240242878A1

    公开(公告)日:2024-07-18

    申请号:US18305705

    申请日:2023-04-24

    Abstract: A planar transformer includes: a first primary winding layer; a second primary winding layer disposed adjacent to the first primary winding layer; a shielding layer disposed adjacent to the first primary winding layer; a first secondary winding layer disposed adjacent to the shielding layer; a second secondary winding layer disposed adjacent to the first secondary winding layer. The first primary winding layer and the second primary winding layer are located at one side of the shielding layer. The first secondary winding layer and the second secondary winding layer are located at another side of the shielding layer.

    FLYING-CAPACITOR CONVERTER WITH ZERO-VOLTAGE SWITCHING

    公开(公告)号:US20240275276A1

    公开(公告)日:2024-08-15

    申请号:US18331383

    申请日:2023-06-08

    CPC classification number: H02M3/01 H02M1/0058 H02M3/10 H02M7/12

    Abstract: A flying capacitor converter with zero-zero switching includes an input inductor, a fast-switching switch leg, a slow-switching switch leg, at least one flying capacitor, a resonant tank, and an output capacitor. The fast-switching switch leg included an upper leg having a plurality of upper switches and a lower leg having a plurality of lower switches. The slow-switching switch leg includes a slow-switching upper switch and a slow-switching lower switch, and the slow-switching upper switch and the slow-switching lower switch are coupled at a second middle node. The at least one flying capacitor is correspondingly coupled between the upper node and the lower node. The resonant tank includes a resonant inductor and a resonant capacitor, and the resonant inductor and the resonant capacitor are coupled in series between the first middle node and the second middle node.

    DUAL MODE CHARGE CONTROL METHOD
    6.
    发明公开

    公开(公告)号:US20240113636A1

    公开(公告)日:2024-04-04

    申请号:US18156911

    申请日:2023-01-19

    CPC classification number: H02M3/33592 H02M1/0009 H02M3/01

    Abstract: A dual mode charge control method includes steps of: detecting an input voltage of the resonance tank, a resonance current of the resonance tank, an output current of the load, and an output voltage of the load; performing a single-band charge control when determining a light-load condition or a no-load condition of the load according to the output current; compensating the output voltage to generate an upper threshold voltage in the single-band charge control, and acquiring a resonance voltage by calculating the resonance current by a resettable integrator; comparing the resonance voltage and the upper threshold voltage to generate a first control signal; generating a second control signal complementary to the first control signal by a pulse-width modulation duplicator; providing the first control signal and the second control signal to respectively control a first power switch and a second power switch of the resonance circuit.

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