公开(公告)号：US20210074631A1

公开(公告)日：2021-03-11

申请号：US17084854

申请日：2020-10-30

Applicant: DENSO CORPORATION

Inventor： Shin TAKIZAWA ,  Seiji NOMA ,  Yusuke NONAKA ,  Shinichirou YANAGI ,  Atsushi KASAHARA ,  Shogo IKEURA

IPC: H01L23/522

Abstract: On a substrate, a wiring layer is arranged by sequentially stacking a first insulation film, a lower electrode, a second insulation film, an intermediate electrode, a third insulation film, and an upper electrode in this order. A capacitor includes a first capacitor having the lower electrode and the intermediate electrode, and a second capacitor having the intermediate electrode and the upper electrode. The first capacitor and the second capacitor are connected in parallel to each other by electrically connecting the lower electrode and the upper electrode. Further, the intermediate electrode has a higher potential than the lower layer electrode and the upper electrode.

公开(公告)号：US20210028277A1

公开(公告)日：2021-01-28

申请号：US17066743

申请日：2020-10-09

Applicant: DENSO CORPORATION

Inventor： Shin TAKIZAWA ,  Yusuke NONAKA ,  Shinichirou YANAGI ,  Atsushi KASAHARA ,  Shogo IKEURA

IPC: H01L29/06 ,  H01L29/866 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor substrate, an upper diffusion region and a lower diffusion region. The semiconductor substrate has a main surface. The upper diffusion region of a first conductivity type is disposed close to the main surface of the semiconductor device. The lower diffusion region of a second conductivity type is disposed up to a position deeper than the upper diffusion region in a depth direction of the semiconductor substrate from the main surface as a reference, and has a higher impurity concentration than the semiconductor substrate. A diode device is provided by having a PN junction surface at an interface between the upper diffusion region and the lower diffusion region, and the PN junction surface has a curved surface disposed at a portion opposite to the main surface.

公开(公告)号：US20190229219A1

公开(公告)日：2019-07-25

申请号：US16368026

申请日：2019-03-28

Applicant: DENSO CORPORATION

Inventor： Shinichirou YANAGI ,  Yusuke NONAKA ,  Seiji NOMA ,  Shinya SAKURAI ,  Shogo IKEURA ,  Atsushi KASAHARA ,  Shin TAKIZAWA

IPC: H01L29/866 ,  H01L29/06 ,  H01L29/868 ,  H01L21/223 ,  H01L21/265

Abstract: A semiconductor device includes: a semiconductor substrate having a diode formation region; an upper diffusion region of a first conductivity type provided on a surface layer of a main surface of the semiconductor substrate in the diode formation region; and a lower diffusion region of a second conductivity type provided at a position deeper than the upper diffusion region with respect to the main surface in a depth direction of the semiconductor substrate, the lower diffusion region having a higher impurity concentration as compared to the semiconductor substrate. The lower diffusion region provides a PN joint surface with the upper diffusion region at a position deeper than the main surface, and has a maximum point indicating a maximum concentration in an impurity concentration profile of the lower diffusion region in the diode formation region.

公开(公告)号：US20170256505A1

公开(公告)日：2017-09-07

申请号：US15502244

申请日：2015-10-02

Applicant: DENSO CORPORATION

Inventor： Shin TAKIZAWA ,  Takashi NAKANO

IPC: H01L23/00 ,  H01L23/522 ,  H01L49/02

Abstract: A semiconductor device includes: a substrate; a first wiring layer arranged above the substrate; a first insulating film covering the first wiring layer; a lower oxidation preventing film arranged on the first insulating film; at least one thin-film resistor arranged on the lower oxidation preventing film; an upper oxidation preventing film arranged on the at least one thin-film resistor; a second insulating film covering the lower oxidation preventing film, the at least one thin-film resistor, and the upper oxidation preventing film; a second wiring layer arranged on the second insulating film; and a third insulating film covering the second wiring layer. The first wiring layer overlaps an end portion of the at least one thin-film resistor when viewed in a normal direction of one surface of the substrate.