公开(公告)号：US20190237457A1

公开(公告)日：2019-08-01

申请号：US16377563

申请日：2019-04-08

Applicant: DENSO CORPORATION

Inventor： Akira YAMADA ,  Shinya SAKURAI ,  Takashi NAKANO ,  Yosuke KONDO ,  Mutsuya MOTOJIMA

IPC: H01L27/02 ,  H01L29/10 ,  H01L29/06 ,  H01L29/78

Abstract: A semiconductor device configures a protection element that protects a protection target element connected between a cathode electrode and an anode electrode when a parasitic transistor configured by a cathode region, a first conductivity type well layer, and a second conductivity type well is turned on and electrical continuity is established between the cathode electrode and the anode electrode. The semiconductor device includes a plurality of body regions in one cell of the protection element, and the plurality of body regions is brought in contact with the cathode electrode.

公开(公告)号：US20190279906A1

公开(公告)日：2019-09-12

申请号：US16074239

申请日：2017-03-13

Applicant: DENSO CORPORATION

Inventor： Shogo IKEURA ,  Yusuke NONAKA ,  Shinichirou YANAGI ,  Seiji NOMA ,  Shinya SAKURAI

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/786 ,  H01L29/66 ,  H01L29/78 ,  H01L29/08

Abstract: A buried n-type region is provided in a surface layer portion of an n-type body layer of a Pch MOSFET. This makes it possible to lower the threshold voltage Vt. In a portion of the n-type body layer other than the buried n-type region, since an n-type impurity concentration can be kept relatively high, the threshold voltage Vt can be lowered while securing an on-breakdown voltage. Furthermore, since an accumulation region is configured by an n-type active layer, a partial high concentration portion is not formed in a p-type drift layer. Therefore, as in the case where the partial high concentration portion is generated in the p-type drift layer, a reduction in a breakdown voltage caused by an electric field concentration can be restricted from occurring with a distribution in which equipotential lines are concentrated.

公开(公告)号：US20190229219A1

公开(公告)日：2019-07-25

申请号：US16368026

申请日：2019-03-28

Applicant: DENSO CORPORATION

Inventor： Shinichirou YANAGI ,  Yusuke NONAKA ,  Seiji NOMA ,  Shinya SAKURAI ,  Shogo IKEURA ,  Atsushi KASAHARA ,  Shin TAKIZAWA

IPC: H01L29/866 ,  H01L29/06 ,  H01L29/868 ,  H01L21/223 ,  H01L21/265

Abstract: A semiconductor device includes: a semiconductor substrate having a diode formation region; an upper diffusion region of a first conductivity type provided on a surface layer of a main surface of the semiconductor substrate in the diode formation region; and a lower diffusion region of a second conductivity type provided at a position deeper than the upper diffusion region with respect to the main surface in a depth direction of the semiconductor substrate, the lower diffusion region having a higher impurity concentration as compared to the semiconductor substrate. The lower diffusion region provides a PN joint surface with the upper diffusion region at a position deeper than the main surface, and has a maximum point indicating a maximum concentration in an impurity concentration profile of the lower diffusion region in the diode formation region.