公开(公告)号：US20120080739A1

公开(公告)日：2012-04-05

申请号：US13221292

申请日：2011-08-30

申请人： Daisuke HAGISHIMA ,  Atsuhiro KINOSHITA ,  Kazuya MATSUZAWA ,  Kazutaka IKEGAMI ,  Yoshifumi NISHI

发明人： Daisuke HAGISHIMA ,  Atsuhiro KINOSHITA ,  Kazuya MATSUZAWA ,  Kazutaka IKEGAMI ,  Yoshifumi NISHI

IPC分类号： H01L29/792

CPC分类号： H01L29/7881 ,  G11C16/0408 ,  H01L27/1052 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11807 ,  H01L29/66825

摘要： A nonvolatile programmable logic switch according to an embodiment includes: a memory cell transistor including: a first source region and a first drain region of a second conductivity type formed at a distance from each other in a first semiconductor region of a first conductivity type; a first insulating film, a charge storage film, a second insulating film, and a control gate stacked in this order and formed on the first semiconductor region between the first source region and the first drain region; a pass transistor including: a second source region and a second drain region of a second conductivity type formed at a distance from each other in a second semiconductor region of the first conductivity type; a third insulating film, a gate electrode stacked in this order and formed on the second semiconductor region between the second source region and the second drain region, the gate electrode being electrically connected to the first drain region; and an electrode for applying a substrate bias to the first and second semiconductor regions.

摘要翻译： 根据实施例的非易失性可编程逻辑开关包括：存储单元晶体管，包括：在第一导电类型的第一半导体区域中彼此间隔开形成的第二导电类型的第一源极区域和第一漏极区域; 第一绝缘膜，电荷存储膜，第二绝缘膜和控制栅极，并且形成在第一源极区域和第一漏极区域之间的第一半导体区域上; 传输晶体管，包括：在第一导电类型的第二半导体区域中彼此成一定距离地形成的第二导电类型的第二源极区域和第二漏极区域; 第三绝缘膜，栅极电极，并且形成在第二源极区域和第二漏极区域之间的第二半导体区域上，栅极电连接到第一漏极区域; 以及用于将衬底偏压施加到第一和第二半导体区域的电极。

公开(公告)号：US20090244981A1

公开(公告)日：2009-10-01

申请号：US12211467

申请日：2008-09-16

申请人： Kazuya MATSUZAWA

发明人： Kazuya MATSUZAWA

IPC分类号： G11C16/06

CPC分类号： G11C16/10

摘要： It is made possible to provide a non-volatile semiconductor memory device capable of improving the writing efficiency and its writing method. Predetermined voltages are respectively applied to a drain region and a control gate, and then the voltage applied to the control gate is opened.

摘要翻译： 可以提供一种能够提高写入效率及其写入方法的非易失性半导体存储器件。 分别将预定电压施加到漏极区域和控制栅极，然后施加到控制栅极的电压被打开。

公开(公告)号：US20080136687A1

公开(公告)日：2008-06-12

申请号：US12024717

申请日：2008-02-01

申请人： Kazuya MATSUZAWA

发明人： Kazuya MATSUZAWA

IPC分类号： H03M7/30

CPC分类号： H03M7/30 ,  Y10S707/99932 ,  Y10S707/99933 ,  Y10S707/99942

摘要： A data compression apparatus has a characterizing point extracting part 1 which extracts data expressing characterizing points included in a plurality of data showing a result of carrying out simulation, quantized data generating part 2 which generates quantized data obtained by quantizing data except for data expressing characterizing points, and file number converting part 3 which converts the same types of quantized data including in the quantized data, into a relating file number. In the case of compressing data, data except for the characterizing points is compressed. If the same quantized data is included at the same address location in the previously-compressed file, the quantized data is replaced with the file number of previously-compression file, thereby compressing data at high efficiency.

摘要翻译： 数据压缩装置具有表征点提取部分1，其提取表示表示进行模拟结果的多个数据中包含的特征点的数据;量化数据产生部分2，其产生通过量化除数据表示特征点之外的数据而获得的量化数据 ，以及将包括在量化数据中的相同类型的量化数据转换成相关文件号的文件号转换部分3。 在压缩数据的情况下，除特征点之外的数据被压缩。 如果相同的量化数据包含在先前压缩文件中的相同地址位置，则将量化的数据替换为先前压缩文件的文件号，从而以高效率压缩数据。