公开(公告)号：US6160388A

公开(公告)日：2000-12-12

申请号：US213681

申请日：1998-12-17

申请人： Dale J. Skelton ,  Chao-Chih Chiu ,  Taylor R. Efland

发明人： Dale J. Skelton ,  Chao-Chih Chiu ,  Taylor R. Efland

IPC分类号： H02M3/158 ,  G05F1/563

CPC分类号： H02M3/1588 ,  H02M2001/0009 ,  Y02B70/1466

摘要： A DC-DC converter that generates a sense signal representing a voltage drop across a low-side switch when the low-side switch is on. The sense signal is inverted and stored in a "hold" capacitor until the beginning of the next switching cycle. More specifically, an input node receives an input voltage V.sub.IN. A driver stage coupled to the input node and to a reference node chops V.sub.IN into a square wave under control of a PWM signal. The chopped V.sub.IN signal is coupled to an intermediate output node. An output stage coupled to the intermediate output node converts the chopped V.sub.IN signal to an output voltage V.sub.OUT to a load coupled to an output node. A sense unit coupled to sense a voltage on the intermediate output node generates a voltage signal indicating current flowing in the load.

摘要翻译： DC-DC转换器，当低侧开关接通时，产生表示低侧开关上的电压降的感测信号。 感测信号被反相并存储在“保持”电容器中，直到下一个开关周期的开始。 更具体地，输入节点接收输入电压VIN。 耦合到输入节点和参考节点的驱动器级在PWM信号的控制下将VIN划分成方波。 斩波的VIN信号耦合到中间输出节点。 耦合到中间输出节点的输出级将斩波的VIN信号转换为耦合到输出节点的负载的输出电压VOUT。 耦合以感测中间输出节点上的电压的感测单元产生指示在负载中流动的电流的电压信号。

公开(公告)号：US07491584B2

公开(公告)日：2009-02-17

申请号：US11186857

申请日：2005-07-22

申请人： Ding-Jeng Yu ,  Tao Cheng ,  Chao-Chih Chiu

发明人： Ding-Jeng Yu ,  Tao Cheng ,  Chao-Chih Chiu

IPC分类号： H01L21/82 ,  H01L21/8222 ,  H01L21/8228

CPC分类号： H01L27/0259 ,  H01L27/0664

摘要： Electrostatic discharge (ESD) protection device in high voltage and the relevant manufacturing method is disclosed. The mentioned ESD protection device is disposed to bridge a ground and an input connected with an inner circuit to be protected. In which, the ESD protection device for high voltage comprises at least one PNP transistor and at least one diode connected in parallel, and an ESD discharging path is formed thereby. The PNP transistor is formed with an adjacent heavily doped P-type semiconductor zone (P+), lightly doped N-type semiconductor zone (N−), and a P-type semiconductor substrate. The diode is formed with an adjacent lightly doped N-type semiconductor zone and a light doped P-type semiconductor zone.

摘要翻译： 公开了高压静电放电（ESD）保护装置及相关制造方法。 上述ESD保护装置被设置成桥接地面和与要保护的内部电路连接的输入。 其中，用于高电压的ESD保护装置包括至少一个PNP晶体管和至少一个二极管并联，并且由此形成ESD放电路径。 PNP晶体管形成有相邻的重掺杂P型半导体区（P +），轻掺杂的N型半导体区（N）和P型半导体衬底。 二极管形成有相邻的轻掺杂N型半导体区和掺杂P型半导体区。

公开(公告)号：US20070020818A1

公开(公告)日：2007-01-25

申请号：US11186857

申请日：2005-07-22

申请人： Ding-Jeng Yu ,  Tao Cheng ,  Chao-Chih Chiu

发明人： Ding-Jeng Yu ,  Tao Cheng ,  Chao-Chih Chiu

IPC分类号： H01L21/82 ,  H01L21/331 ,  H01L21/8222

CPC分类号： H01L27/0259 ,  H01L27/0664

摘要： Electrostatic discharge (ESD) protection device in high voltage and the relevant manufacturing method is disclosed. The mentioned ESD protection device is disposed to bridge a ground and an input connected with an inner circuit to be protected. In which, the ESD protection device for high voltage comprises at least one PNP transistor and at least one diode connected in parallel, and an ESD discharging path is formed thereby. The PNP transistor is formed with an adjacent heavily doped P-type semiconductor zone (P+), lightly doped N-type semiconductor zone (N−), and a P-type semiconductor substrate. The diode is formed with an adjacent lightly doped N-type semiconductor zone and a light doped P-type semiconductor zone.

摘要翻译： 公开了高压静电放电（ESD）保护装置及相关制造方法。 上述ESD保护装置被设置成桥接地面和与要保护的内部电路连接的输入。 其中，用于高电压的ESD保护装置包括至少一个PNP晶体管和至少一个二极管并联，并且由此形成ESD放电路径。 PNP晶体管形成有相邻的重掺杂P型半导体区（P +），轻掺杂的N型半导体区（N）和P型半导体衬底。 二极管形成有相邻的轻掺杂N型半导体区和掺杂P型半导体区。

公开(公告)号：US08044466B2

公开(公告)日：2011-10-25

申请号：US12352407

申请日：2009-01-12

申请人： Ding-Jeng Yu ,  Tao Cheng ,  Chao-Chih Chiu

发明人： Ding-Jeng Yu ,  Tao Cheng ,  Chao-Chih Chiu

IPC分类号： H01L23/62

CPC分类号： H01L27/0259 ,  H01L27/0664

摘要： An ESD protection device comprises a substrate of a first conductive type; a transistor formed in the substrate having an input terminal of the first conductive type, a control terminal of a second conductive type, and a ground terminal of the first conductive type; and a diode formed in the substrate having a first terminal of the first conductive type and a second terminal of the second conductive type, wherein the input terminal and the second terminal are coupled to an input, and the ground terminal and the first terminal are coupled to a ground.

摘要翻译： ESD保护器件包括第一导电类型的衬底; 形成在所述基板中的晶体管具有所述第一导电类型的输入端子，第二导电类型的控制端子和所述第一导电类型的接地端子; 以及形成在所述基板中的二极管，其具有所述第一导电类型的第一端子和所述第二导电类型的第二端子，其中所述输入端子和所述第二端子耦合到输入端，并且所述接地端子和所述第一端子耦合 到地面

公开(公告)号：US6087852A

公开(公告)日：2000-07-11

申请号：US206871

申请日：1998-12-08

申请人： David D. Briggs ,  Fernando D. Carvajal ,  Chao-Chih Chiu

发明人： David D. Briggs ,  Fernando D. Carvajal ,  Chao-Chih Chiu

IPC分类号： H03K3/356 ,  H03K17/00 ,  H03K17/10 ,  H03K19/0175 ,  H03L5/00

CPC分类号： H03K17/102 ,  H03K17/005 ,  H03K3/356113

摘要： The invention is a multiplex circuit for outputing two or more signals of different levels to a common output pad where a first output driver (D.sub.h) is powered from a voltage rail having a higher voltage than at least one second output driver (D.sub.1) power by a lower voltage rail. An interface circuit (IFC) and level shift circuit provides two output signals base on a single input signal, one signal being equivalent to the voltage of the higher voltage (V.sub.High) and the other being based on the lower voltage (V.sub.low). PMOS device connected to the output pad has its back gate connected to V.sub.high to prevent leakage current through the PMOS device when the output to the output pad (P.sub.1) is equivalent to V.sub.High.

摘要翻译： 本发明是用于向公共输出焊盘输出不同电平的两个或更多个信号的多路复用电路，其中第一输出驱动器（Dh）由具有比至少一个第二输出驱动器（D1）功率更高的电压的电压轨被供电，由 一个较低的电压轨。 接口电路（IFC）和电平移位电路基于单个输入信号提供两个输出信号，一个信号等于较高电压（VHigh）的电压，另一个信号基于较低电压（Vlow）。 连接到输出焊盘的PMOS器件的背栅极连接到Vhigh，以防止当输出到输出焊盘（P1）的输出相当于VHigh时通过PMOS器件的漏电流。