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    Pixel Interconnect Insulators and Methods Thereof
    2.
    发明申请
    Pixel Interconnect Insulators and Methods Thereof 有权
    像素互连绝缘体及其方法

    公开(公告)号：US20100038539A1

    公开(公告)日：2010-02-18

    申请号：US12191596

    申请日：2008-08-14

    申请人： Darrel W. Endres ,  Richard Rawe ,  Charles Martin

    发明人： Darrel W. Endres ,  Richard Rawe ,  Charles Martin

    IPC分类号： H01L25/00 ,  H01L21/00 ,  G01J5/00

    CPC分类号： H01L27/14636 ,  H01L24/10 ,  H01L24/81 ,  H01L27/14634 ,  H01L27/14649 ,  H01L27/1465 ,  H01L27/1467 ,  H01L27/14687 ,  H01L27/14689 ,  H01L27/14881 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/10126 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

    摘要： Particular embodiments relate generally to infrared focal plane arrays and methods thereof. According to one embodiment, an infrared focal plane comprises an array of pixels configured to detect optical radiation in a predetermined radiation band are positioned on a support substrate. The pixels are connected to pixel contacts on a read-out integrated circuit via pixel interconnects comprising bonding bumps. According to some embodiments, indium migration is blocked by a patterned electrical insulator comprising a plurality of intersecting walls defining a plurality of cells that surround each pixel interconnect. The patterned electrical insulator may be dimensioned such that it does not physically contact the support substrate, the array of pixels or pixel interconnects. In this manner, pixel-pair defects due to indium migration resulting from cryogenic thermal-cycling may be prevented, thereby extending the thermal-cycling lifetime of the focal plane array.

    摘要翻译： 具体实施方案一般涉及红外焦平面阵列及其方法。 根据一个实施例，红外焦平面包括被配置为检测预定辐射带中的光辐射的像素阵列位于支撑衬底上。 像素通过包括接合凸块的像素互连连接到读出集成电路上的像素触点。 根据一些实施例，铟迁移被包括限定围绕每个像素互连的多个单元的多个相交壁的图案化电绝缘体阻挡。 图案化电绝缘体的尺寸可以使其不物理地接触支撑衬底，像素阵列或像素互连。 以这种方式，可以防止由于低温热循环引起的铟迁移引起的像素对缺陷，从而延长焦平面阵列的热循环寿命。

    Hybrid interconnection structure
    3.
    发明授权
    Hybrid interconnection structure 失效
    混合互连结构

    公开(公告)号：US4989067A

    公开(公告)日：1991-01-29

    申请号：US374932

    申请日：1989-07-03

    申请人： Milton L. Noble ,  Albert F. Milton ,  Darrel W. Endres ,  Douglas W. Dietz

    发明人： Milton L. Noble ,  Albert F. Milton ,  Darrel W. Endres ,  Douglas W. Dietz

    IPC分类号： H01L25/16

    CPC分类号： H01L25/167 ,  H01L2924/0002

    摘要： A hybrid interconnection structure is disclosed having application to the fine pitch interconnection of delicate semiconductor chips. The invention entails the use of a beam lead interconnect in which patterned conductor runs are provided on the upper surface of a silicon chip. The conductor runs extend beyond the chip to form a paired set of beam leads. One set of beam leads makes contact with terminals on the upper surface of one chip and the other set of beam leads makes contact with terminals on the upper surface of another chip. The interconnect chip is set on a substrate common to the interconnected chips with its top surface slightly (normally less than 1-2 mils) above the top surfaces of the interconnected chips. This limits any downward deformation of the beam leads in the bonding process to insure reliability of the bond for fine pitch application. The invention has specific application to arrays of infrared detectors in which interconnections are provided between a delicate light sensing chip of mercury cadmium telluride or indium antimonide and more rugged readout integrated circuits, usually of silicon.

    摘要翻译： 公开了一种应用于精细半导体芯片的精细间距互连的混合互连结构。 本发明需要使用其中在硅芯片的上表面上提供图案化导体线的光束引线互连。 导体延伸超过芯片以形成一对成对的光束引线。 一组光束引线与一个芯片的上表面上的端子接触，另一组光束引线与另一芯片上表面上的端子接触。 互连芯片设置在互连芯片公共的衬底上，其上表面在互连芯片的顶表面之上略微（通常小于1-2密耳）。 这限制了接合过程中光束引线的任何向下变形，以确保用于细间距施加的键的可靠性。 本发明具体应用于红外线检测器阵列，其中在碲化镉碲化镉或锑化锑的精细光感测芯片之间提供互连，并且通常采用更坚固的读出集成电路。