INTEGRATED STRUCTURE OF OPTOELECTRONIC ELEMENT AND CIRCUIT, AND INTEGRATING METHOD THEREOF

    公开(公告)号:US20240339485A1

    公开(公告)日:2024-10-10

    申请号:US18631344

    申请日:2024-04-10

    IPC分类号: H01L27/146

    摘要: The present invention provides an integrating method for optoelectronic elements and circuits, including: providing a silicon wafer including a plurality of circuit structures; providing a plurality of optoelectronic element dies, and each optoelectronic element die including a substrate and an optoelectronic element structure; performing a die-to-wafer bonding process so that one optoelectronic element die is correspondingly bonded to one circuit structure of the silicon wafer through the optoelectronic element structure; performing a compression over-molding process to encapsulate the optoelectronic element dies and a surface of the silicon wafer by a molding material; performing a grinding and polishing process to remove an unnecessary portion of the molding material and an unnecessary portion of the substrate of each optoelectronic element die; and performing a dicing process to form a plurality of integrated structures with the optoelectronic elements and the circuits.

    Solid-state image pickup device
    5.
    发明授权

    公开(公告)号:US12068351B2

    公开(公告)日:2024-08-20

    申请号:US18322239

    申请日:2023-05-23

    发明人: Mineo Shimotsusa

    IPC分类号: H01L27/146 H01L31/09

    摘要: A solid-state image pickup device capable of suppressing the generation of dark current and/or leakage current is provided. The solid-state image pickup device has a first substrate provided with a photoelectric converter on its primary face, a first wiring structure having a first bonding portion which contains a conductive material, a second substrate provided with a part of a peripheral circuit on its primary face, and a second wiring structure having a second bonding portion which contains a conductive material. In addition, the first bonding portion and the second bonding portion are bonded so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. Furthermore, the conductive material of the first bonding portion and the conductive material of the second bonding portion are surrounded with diffusion preventing films.

    3-side buttable stitched image sensor

    公开(公告)号:US12061420B2

    公开(公告)日:2024-08-13

    申请号:US17197481

    申请日:2021-03-10

    发明人: Renato Turchetta

    IPC分类号: G03F7/00 H01L27/146

    摘要: A sensor fabricated from a plurality of layers on a semiconductor wafer. The sensor comprises a plurality of sensor elements arranged in stitching blocks and having a plurality of vertically arranged read-out lines, a plurality of vertically arranged select/reset lines, and a plurality of horizontally arranged select/reset lines, running from a right-hand edge to an oppositely disposed left hand edge and being connected to ones of the plurality of vertically arranged select/reset lines, plurality of read-out circuits connected to the plurality of vertically arranged read-out lines, and ones of the plurality of vertically arranged read-out lines swerve at one of the bottom or top edges of the stitching blocks, such that ones of the plurality of vertically arranged read-out lines in a first one of the plurality of stitching blocks connect to a displaced one of the vertical lines in a second abutting one of the plurality of stitching blocks.