公开(公告)号：US09847340B2

公开(公告)日：2017-12-19

申请号：US14227217

申请日：2014-03-27

申请人： Darwin Fan ,  Sateesh Koka ,  Gordon Haller ,  John Hopkins ,  Shyam Surthi ,  Anish Khandekar

发明人： Darwin Fan ,  Sateesh Koka ,  Gordon Haller ,  John Hopkins ,  Shyam Surthi ,  Anish Khandekar

IPC分类号： H01L29/788 ,  H01L27/11524 ,  H01L27/11556

CPC分类号： H01L27/11524 ,  H01L21/28273 ,  H01L27/11556

摘要： 3D NAND memory structures and related method are provided. In some embodiments such structures can include a control gate material and a floating gate material disposed between a first insulating layer and a second insulating layer, an interpoly dielectric (IPD) layer disposed between the floating gate material and control gate material such that the IPD layer electrically isolates the control gate material from the floating gate material, and a tunnel dielectric material deposited on the floating gate material opposite the control gate material.

公开(公告)号：US20150279851A1

公开(公告)日：2015-10-01

申请号：US14227217

申请日：2014-03-27

申请人： Darwin Fan ,  Sateesh Koka ,  Gordon Haller ,  John Hopkins ,  Shyam Surthi ,  Anish Khandekar

发明人： Darwin Fan ,  Sateesh Koka ,  Gordon Haller ,  John Hopkins ,  Shyam Surthi ,  Anish Khandekar

IPC分类号： H01L27/115 ,  H01L29/423 ,  H01L21/28

CPC分类号： H01L27/11524 ,  H01L21/28273 ,  H01L27/11556

摘要： 3D NAND memory structures and related method are provided. In some embodiments such structures can include a control gate material and a floating gate material disposed between a first insulating layer and a second insulating layer, an interpoly dielectric (IPD) layer disposed between the floating gate material and control gate material such that the IPD layer electrically isolates the control gate material from the floating gate material, and a tunnel dielectric material deposited on the floating gate material opposite the control gate material.

摘要翻译： 提供3D NAND存储器结构及相关方法。 在一些实施例中，这样的结构可以包括设置在第一绝缘层和第二绝缘层之间的控制栅极材料和浮置栅极材料，设置在浮置栅极材料和控制栅极材料之间的多层电介质（IPD）层，使得IPD层 将控制栅极材料与浮动栅极材料电隔离，以及沉积在与控制栅极材料相对的浮动栅极材料上的隧道电介质材料。