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    Systems and method for hiding from a computer system entry of a personal identification number (pin) to a smart card
    4.
    发明授权
    Systems and method for hiding from a computer system entry of a personal identification number (pin) to a smart card 有权
    将个人识别号码（PIN）的计算机系统入口隐藏到智能卡的系统和方法

    公开(公告)号：US06598032B1

    公开(公告)日：2003-07-22

    申请号：US09523490

    申请日：2000-03-10

    申请人： David Carroll Challener ,  Joseph McGovern ,  Hernando Ovies ,  James Peter Ward

    发明人： David Carroll Challener ,  Joseph McGovern ,  Hernando Ovies ,  James Peter Ward

    IPC分类号： G06F1760

    CPC分类号： G07F7/1008 ,  G06Q20/382 ,  G06Q20/401 ,  G06Q20/4012 ,  G07F7/1025

    摘要： A system and method for isolating a computer system from entry of a personal identification number (PIN) to a smart card. The system and method includes a computer system that is in communication with an unsecure network to allow a user to engage in a purchase transaction. The system and method also includes a smart card reader in which a smart card is inserted and read. A secure personal-identification-number (PIN) entry device is coupled between the computer system and the smart card reader. The secure PIN entry device is used for entering a correct code for the PIN. Communication between computer system and secure PIN entry device is disconnected until the correct code for the PIN is entered at secure PIN entry device and sent to the smart card in order to authorize use of the smart card for the purchase transaction. In response to the correct code for the PIN being entered and sent to the smart card, communication between computer system and secure PIN entry device is established. The secure PIN entry device has a processor for controlling the disconnection and connection of communication between the computer system and the secure PIN entry device. The secure PIN entry device also has a display for displaying a message request relating to the purchase transaction. The message request prompts a user to provide the PIN to authorize use of the smart card for a purchase transaction.

    摘要翻译： 一种用于将计算机系统与个人识别号码（PIN）输入到智能卡的系统和方法。 该系统和方法包括与不安全网络通信以允许用户参与购买交易的计算机系统。 该系统和方法还包括其中插入和读取智能卡的智能卡读卡器。 安全的个人识别号码（PIN）输入设备耦合在计算机系统和智能卡读卡器之间。 安全PIN输入设备用于输入PIN的正确代码。 计算机系统和安全PIN输入设备之间的通信被断开，直到PIN的正确代码被输入到安全的PIN输入设备并被发送到智能卡以授权使用智能卡进行购买交易。 为了响应正在输入的PIN并将其发送到智能卡的正确代码，建立计算机系统和安全PIN输入设备之间的通信。 安全PIN输入设备具有用于控制计算机系统和安全PIN输入设备之间的通信的断开和连接的处理器。 安全PIN输入设备还具有用于显示与购买交易相关的消息请求的显示。 消息请求提示用户提供PIN以授权使用智能卡进行购买交易。

    System and apparatus for limiting access to secure data through a portable computer to a time set with the portable computer connected to a base computer
    5.
    发明授权
    System and apparatus for limiting access to secure data through a portable computer to a time set with the portable computer connected to a base computer 有权
    用于通过便携式计算机限制访问安全数据到与连接到基本计算机的便携式计算机设定的时间的系统和装置

    公开(公告)号：US07389536B2

    公开(公告)日：2008-06-17

    申请号：US09993135

    申请日：2001-11-14

    申请人： David Carroll Challener ,  Ernest Nelson Mandese ,  Hernando Ovies ,  James Peter Ward

    发明人： David Carroll Challener ,  Ernest Nelson Mandese ,  Hernando Ovies ,  James Peter Ward

    IPC分类号： H04L9/00 ,  G06F11/00

    CPC分类号： G06F21/88 ,  G06F21/606 ,  G06F21/62 ,  G06F2221/2137

    摘要： Access to secure data through a portable computing system is provided only when a timer within the system is running. The timer is reset with the portable system connected to a base system, either directly, as by a cable, or indirectly, as through a telephone network. In an initialization process, the portable and base systems exchange data, such as public cryptographic keys, which are later used to confirm that the portable system is connected to the same base system. In one embodiment, the initialization process also includes storing a password transmitted from the portable system within the base system, with this password later being required within the reset process.

    摘要翻译： 只有当系统中的计时器正在运行时才能通过便携式计算系统访问安全数据。 定时器被重置，便携式系统通过电缆直接连接到基本系统，或通过电话网络间接连接。 在初始化过程中，便携式和基本系统交换诸如公共密码密钥的数据，这些密钥稍后用于确认便携式系统连接到相同的基本系统。 在一个实施例中，初始化过程还包括将从便携式系统发送的密码存储在基本系统内，随后在复位过程中需要该密码。

    Data processing system and method for providing a networked printer's physical location
    6.
    发明授权
    Data processing system and method for providing a networked printer's physical location 失效
    数据处理系统和方法，用于提供网络打印机的物理位置

    公开(公告)号：US06591297B1

    公开(公告)日：2003-07-08

    申请号：US09514797

    申请日：2000-02-28

    申请人： David Carroll Challener ,  Joseph P. McGovern ,  Frank P. Novak ,  Hernando Ovies

    发明人： David Carroll Challener ,  Joseph P. McGovern ,  Frank P. Novak ,  Hernando Ovies

    IPC分类号： G06F1300

    CPC分类号： G06F3/1204 ,  G06F3/1229 ,  G06F3/1232 ,  G06F3/1285

    摘要： A data processing system and method are described for providing a networked printer's physical location. The printer, a server computer system, and client computer systems are coupled together utilizing a network. The server computer system first transmits a command to the printer to disable the print function of the printer. Entry of a physical location of the printer is then permitted. The print function of the printer is reenabled by the server computer system only in response to an entry of the physical location of the printer into the printer.

    摘要翻译： 描述了一种用于提供联网打印机的物理位置的数据处理系统和方法。 打印机，服务器计算机系统和客户端计算机系统利用网络耦合在一起。 服务器计算机系统首先向打印机发送命令以禁用打印机的打印功能。 然后允许输入打印机的物理位置。 打印机的打印功能仅由服务器计算机系统重新启用，以响应打印机的物理位置进入打印机。

    Method for migrating a base chip key from one computer system to another
    7.
    发明授权
    Method for migrating a base chip key from one computer system to another 有权
    将基本芯片密钥从一台计算机系统迁移到另一台计算机系统的方法

    公开(公告)号：US06944300B2

    公开(公告)日：2005-09-13

    申请号：US09888176

    申请日：2001-06-22

    申请人： David Carroll Challener ,  Hernando Ovies

    发明人： David Carroll Challener ,  Hernando Ovies

    IPC分类号： G06F21/00 ,  H04L9/30 ,  H04L9/32 ,  H04L9/00

    CPC分类号： G06F21/606 ,  G06F2221/2107 ,  H04L9/0825 ,  H04L9/0897 ,  H04L9/3263

    摘要： A method for migrating a base chip key from a first computer system to a second computer system is disclosed. A first computer system includes a base chip key 1, and a second computer system includes a base chip key 2. Using a first certificate for the base chip key 1, a manufacturer of the second computer system generates a second certificate for the base chip key 1. Similarly, using a first certificate for the base chip key 2, a manufacturer of the first computer system generates a second certificate for the base chip key 2. A first data packet is then sent from the first computer system to the second computer system. The first data packet includes a first random number and all the data required to reproduce the base chip key 1 in the first computer system. The first data packet is also encrypted with the base chip key 1's public key. In return, a second data packet is sent from the second computer system to the first computer system, and the second data packet includes the first random number and a second random number, signed by the base chip key 2. The base chip key 1 is then erased from the first computer system. Finally, the base chip key 2 in the second computer system is replaced by the base chip key 1.

    摘要翻译： 公开了一种用于将基本芯片密钥从第一计算机系统迁移到第二计算机系统的方法。 第一计算机系统包括基本芯片密钥1，第二计算机系统包括基本密钥密钥2。 使用基本芯片密钥1的第一证书，第二计算机系统的制造商生成用于基本密钥密钥1的第二证书。 类似地，对于基本芯片键2使用第一证书，第一计算机系统的制造商生成用于基本芯片键2的第二证书。 然后，第一数据分组从第一计算机系统发送到第二计算机系统。 第一数据分组包括第一随机数和在第一计算机系统中再现基本芯片密钥1所需的所有数据。 第一数据包也用基本密钥1的公开密钥加密。 作为回报，第二数据分组从第二计算机系统被发送到第一计算机系统，并且第二数据分组包括由基本芯片键2签名的第一随机数和第二随机数。 然后从第一计算机系统擦除基本密钥1。 最后，第二计算机系统中的基本芯片键2由基本芯片键1代替。

    I/O controller for multiple disparate serial memories with a cache
    8.
    发明授权
    I/O controller for multiple disparate serial memories with a cache 失效
    具有缓存的多个不同的串行存储器的I / O控制器

    公开(公告)号：US4825357A

    公开(公告)日：1989-04-25

    申请号：US110080

    申请日：1987-10-14

    申请人： Hernando Ovies ,  Neil A. Katz ,  Robert H. Farrell ,  Ernest D. Baker

    发明人： Hernando Ovies ,  Neil A. Katz ,  Robert H. Farrell ,  Ernest D. Baker

    IPC分类号： G06F13/12 ,  G06F3/06 ,  G06F12/08 ,  G06F13/00

    CPC分类号： G06F12/0866

    摘要： An I/O controller for a computer system having a plurality of memory devices of different types such as floppy and hard disks, whereinn a single cache memory is employed for all of the memory devices. Each of the memory devices is provided with its own interface device which directs data outputted from the associated memory device onto a common device bus. From the device bus data is transferred to a cache memory via a separate cache bus, and then to a system processor via the same cache bus. Memory space within the cache memory may be allocated among the various memory devices.

    摘要翻译： 一种用于具有不同类型的多个存储器件（诸如软盘和硬盘）的计算机系统的I / O控制器，其中在所有存储器件中采用单个高速缓冲存储器。 每个存储器件都具有其自身的接口装置，其将从相关联的存储器件输出的数据引导到公共设备总线上。 从设备总线数据通过单独的高速缓存总线传输到高速缓冲存储器，然后通过相同的高速缓存总线传送到系统处理器。 高速缓冲存储器内的存储器空间可以在各种存储器件之间分配。