公开(公告)号：US08549313B2

公开(公告)日：2013-10-01

申请号：US13459129

申请日：2012-04-28

Applicant: Jean-Marc L. Seguin ,  Jay M. Litkey ,  David M. Lynch ,  Mark Jamensky

Inventor： Jean-Marc L. Seguin ,  Jay M. Litkey ,  David M. Lynch ,  Mark Jamensky

IPC: G06F21/00

CPC classification number: G06F21/64 ,  G06F21/51 ,  G06F21/54

Abstract: Method and system for the integrated securing and managing of virtual machines and virtual appliances are presented. Sealing the virtual appliance at the computer of a sender, verifying authenticity of the sender at a recipient computer and managing the execution of the VA are performed in a seamless fashion.

Abstract translation: 介绍了虚拟机和虚拟设备的集成保护和管理方法和系统。 在发件人的计算机上密封虚拟设备，验证收件人计算机上的发件人的真实性并管理VA的执行是以无缝的方式进行的。

公开(公告)号：US20120216045A1

公开(公告)日：2012-08-23

申请号：US13459129

申请日：2012-04-28

Applicant: Jean-Marc SEGUIN ,  Jay M. Litkey ,  David M. Lynch ,  Mark Jamensky

Inventor： Jean-Marc SEGUIN ,  Jay M. Litkey ,  David M. Lynch ,  Mark Jamensky

IPC: G06F21/00

CPC classification number: G06F21/64 ,  G06F21/51 ,  G06F21/54

Abstract: Method and system for the integrated securing and managing of virtual machines and virtual appliances are presented. Sealing the virtual appliance at the computer of a sender, verifying authenticity of the sender at a recipient computer and managing the execution of the VA are performed in a seamless fashion.

Abstract translation: 介绍了虚拟机和虚拟设备的集成保护和管理方法和系统。 在发件人的计算机上密封虚拟设备，验证收件人计算机上的发件人的真实性并管理VA的执行是以无缝的方式进行的。

公开(公告)号：US08055939B2

公开(公告)日：2011-11-08

申请号：US12236849

申请日：2008-09-24

Applicant: David M. Lynch ,  Andelon X. Tra ,  Oswin E. Housty

Inventor： David M. Lynch ,  Andelon X. Tra ,  Oswin E. Housty

IPC: G06F11/00

CPC classification number: G06F13/4022 ,  G06F11/2033 ,  G06F11/2035 ,  G06F11/2043

Abstract: A method includes establishing a first link between a first processor device and a first memory module at a first time. A second link is established between a second processor device and a second memory module at a second time. In response to receiving a first event indicator, a third link is established between the first processor device and the second memory module at a third time, the third time after the first time and the second time.

Abstract translation: 一种方法包括在第一时间在第一处理器设备和第一存储器模块之间建立第一链接。 在第二时间在第二处理器设备和第二存储器模块之间建立第二链路。 响应于接收到第一事件指示符，在第三时间，第一时间和第二时间之后的第三时间，在第一处理器设备和第二存储器模块之间建立第三链接。

公开(公告)号：US20090240981A1

公开(公告)日：2009-09-24

申请号：US12054022

申请日：2008-03-24

Applicant: Andelon X. Tra ,  David M. Lynch ,  Oswin Housty

Inventor： Andelon X. Tra ,  David M. Lynch ,  Oswin Housty

IPC: G06F15/177 ,  G06F11/16 ,  G06F13/14

CPC classification number: G06F11/2028 ,  G06F9/4405 ,  G06F11/1417 ,  G06F11/2046 ,  G06F15/177

Abstract: A method of booting a multi-processor data processing device includes establishing a link between a first processor and a memory. The link is monitored to determine if, in response to a request from the processor, expected initialization data is communicated between the memory and the first processor. If unexpected data is detected on the link, the link is severed and a new link established between a second processor and the memory to allow the second processor to initiate the boot process. This ensures that, in the event of an error in the boot process at the first processor, the device can complete the boot process, thereby reducing device downtime.

Abstract translation: 引导多处理器数据处理设备的方法包括建立第一处理器和存储器之间的链接。 监视链路以确定响应于来自处理器的请求，在存储器和第一处理器之间是否传送预期的初始化数据。 如果在链路上检测到意外的数据，链路被切断，并且在第二处理器和存储器之间建立一个新的链接，以允许第二处理器启动引导过程。 这确保了在第一处理器的引导过程发生错误的情况下，设备可以完成启动过程，从而减少设备停机时间。

公开(公告)号：US20100077253A1

公开(公告)日：2010-03-25

申请号：US12236849

申请日：2008-09-24

Applicant: David M. Lynch ,  Andelon X. Tra ,  Oswin E. Housty

Inventor： David M. Lynch ,  Andelon X. Tra ,  Oswin E. Housty

IPC: G06F11/20 ,  G06F13/00 ,  G06F12/00 ,  G06F3/00

CPC classification number: G06F13/4022 ,  G06F11/2033 ,  G06F11/2035 ,  G06F11/2043

Abstract: A method includes establishing a first link between a first processor device and a first memory module at a first time. A second link is established between a second processor device and a second memory module at a second time. In response to receiving a first event indicator, a third link is established between the first processor device and the second memory module at a third time, the third time after the first time and the second time.

Abstract translation: 一种方法包括在第一时间在第一处理器设备和第一存储器模块之间建立第一链接。 在第二时间在第二处理器设备和第二存储器模块之间建立第二链路。 响应于接收到第一事件指示符，在第三时间，第一时间和第二时间之后的第三时间，在第一处理器设备和第二存储器模块之间建立第三链接。

公开(公告)号：US20090097239A1

公开(公告)日：2009-04-16

申请号：US12249205

申请日：2008-10-10

Applicant: David M. Lynch

Inventor： David M. Lynch

IPC: F21L4/04

CPC classification number: F21V33/008 ,  F42B6/06

Abstract: The present invention generally relates to a lighted archery nock. The lighted archery nock generally includes an accelerometer, a replaceable battery, a light, a housing, and a controller that controls illumination of the light. The controller can control emission of the light to conserve battery life, and can respond to user input transmitted by tapping the nock to re-set the light. The housing is configured with a plurality of fingers that secure the replaceable battery.

Abstract translation: 本发明一般涉及一种照明射箭射击场。 点燃的射箭通常包括加速度计，可更换电池，灯，外壳和控制光照射的控制器。 控制器可以控制光的发射以节省电池寿命，并且可以通过点击nock来发射的用户输入来重新设置光。 壳体配置有固定可更换电池的多个指状物。

公开(公告)号：US06388943B1

公开(公告)日：2002-05-14

申请号：US09772420

申请日：2001-01-29

Applicant: J. David Schell ,  David M. Lynch ,  Jaime Juarez

Inventor： J. David Schell ,  David M. Lynch ,  Jaime Juarez

IPC: G11C800

CPC classification number: G06F1/04

Abstract: Various circuits for shifting the crossing point level of a pair of differential clocks signals are disclosed. In some embodiments, a differential clock driver provides a pair of differential clock signals to a device having a specified valid range for the crossing point of the differential clock signals. A level-shifting device is coupled to one or both of the differential clock signals to shift the crossing point to lie within the valid range. The device may be a memory device in some embodiments, and in certain embodiments the memory device may be DDR SDRAM. A method for configuring a computer system is also disclosed. An actual differential clock crossing point is compared to a specified range for the crossing point. If the actual crossing point is not within the specified range, a level-shifting device is coupled to one or both of the differential clock signals.

Abstract translation: 公开了用于移位一对差分时钟信号的交叉点电平的各种电路。 在一些实施例中，差分时钟驱动器向具有用于差分时钟信号的交叉点的指定有效范围的器件提供一对差分时钟信号。 电平移位装置耦合到差分时钟信号中的一个或两个以将交叉点移动到有效范围内。 在一些实施例中，该设备可以是存储设备，并且在某些实施例中，存储器设备可以是DDR SDRAM。 还公开了一种用于配置计算机系统的方法。 将实际的差分时钟交叉点与交叉点的指定范围进行比较。 如果实际交叉点不在规定范围内，则电平移位装置耦合到差分时钟信号中的一个或两个。

公开(公告)号：US20140082558A1

公开(公告)日：2014-03-20

申请号：US13620122

申请日：2012-09-14

Applicant: David M. Lynch

Inventor： David M. Lynch

IPC: G06F3/048

CPC classification number: G06F3/0481 ,  G06F9/451

Abstract: A method and apparatus provides a user an interface for a file system. In one example, the method and apparatus displays the file as a visualized object, e.g., a graphical representation of the file as a real life object, receives selection of visualized objects and activates data elements represented by the visualized objects. The visualization of the file may be determined based on visualizer identification information associated with the file. For the activated data elements, the method and apparatus displays tool interfaces, in combination with the visualized objects. The tool interfaces may be selectively displayed for the activated data element base on tool identification information associated with a data type of the data element. Furthermore, the method and apparatus can process the activated data elements using the selected tool actions from different programs.

Abstract translation: 方法和装置向用户提供文件系统的接口。 在一个示例中，该方法和装置将该文件显示为可视化对象，例如作为实际对象的文件的图形表示，接收可视化对象的选择并激活由可视化对象表示的数据元素。 可以基于与文件相关联的可视化器识别信息来确定文件的可视化。 对于激活的数据元素，方法和装置结合可视化对象显示工具界面。 可以基于与数据元素的数据类型相关联的工具识别信息，为激活的数据元素选择性地显示工具接口。 此外，该方法和装置可以使用来自不同程序的所选择的工具动作来处理激活的数据元素。

公开(公告)号：US07931550B2

公开(公告)日：2011-04-26

申请号：US12249210

申请日：2008-10-10

Applicant: David M. Lynch

Inventor： David M. Lynch

IPC: F42B6/06

CPC classification number: F21V33/008 ,  F42B6/06

Abstract: The present invention generally relates to a lighted archery nock. The lighted archery nock generally includes an accelerometer, a replaceable battery, a light, a housing, and a microprocessor that controls illumination of the light. The microprocessor can control the timing of the light to save battery life and respond to user input transmitted by tapping the nock to re-set the light. The housing is configured with a plurality of fingers that interact with the replaceable battery to hold it in place.

Abstract translation: 本发明一般涉及一种照明射箭射击场。 点燃的射箭通常包括加速度计，可更换电池，灯，外壳和控制光照射的微处理器。 微处理器可以控制光的定时，以节省电池的使用寿命，并响应通过点击nock发送的用户输入来重新设置光。 壳体配置有与可更换电池相互作用以将其保持在适当位置的多个指状物。

公开(公告)号：US07927240B2

公开(公告)日：2011-04-19

申请号：US12249205

申请日：2008-10-10

Applicant: David M. Lynch

Inventor： David M. Lynch

IPC: F42B6/06

CPC classification number: F21V33/008 ,  F42B6/06

Abstract: The present invention generally relates to a lighted archery nock. The lighted archery nock generally includes an accelerometer, a replaceable battery, a light, a housing, and a controller that controls illumination of the light. The controller can control emission of the light to conserve battery life, and can respond to user input transmitted by tapping the nock to re-set the light. The housing is configured with a plurality of fingers that secure the replaceable battery.

Abstract translation: 本发明一般涉及一种照明射箭射击场。 点燃的射箭通常包括加速度计，可更换电池，灯，外壳和控制光照射的控制器。 控制器可以控制光的发射以节省电池寿命，并且可以通过点击nock来发射的用户输入来重新设置光。 壳体配置有固定可更换电池的多个指状物。