公开(公告)号：US10394998B2

公开(公告)日：2019-08-27

申请号：US13401922

申请日：2012-02-22

申请人： David W. Cummings ,  Douglas A. MacKay ,  Vasantha R. Vuyyuru

发明人： David W. Cummings ,  Douglas A. MacKay ,  Vasantha R. Vuyyuru

IPC分类号： G06F17/50

摘要： Embodiments of the present invention provide a system, method, and program product for accelerating a simulated memory walking sequence during a simulation conducted by a computer. In one embodiment, a simulation test-case is executed and one or more memory locations in the simulated memory are identified as eligible to contain valid data. Subsequent to commencement of the simulated memory walking sequence, it is determined whether an identified memory location is within a specified number of memory locations after a memory location to be processed by simulated hardware during the simulated memory walking sequence. If an identified memory location is within the specified number, the simulated hardware is allowed to process the memory location. If an identified memory location is not within the specified number, the simulated hardware is advanced to a subsequent memory location and is allowed to process the subsequent memory location.

公开(公告)号：US20130218550A1

公开(公告)日：2013-08-22

申请号：US13401922

申请日：2012-02-22

申请人： David W. Cummings ,  Douglas A. MacKay ,  Vasantha R. Vuyyuru

发明人： David W. Cummings ,  Douglas A. MacKay ,  Vasantha R. Vuyyuru

IPC分类号： G06F21/00

CPC分类号： G06F17/5081

摘要： Embodiments of the present invention provide a system, method, and program product for accelerating a simulated memory walking sequence during a simulation conducted by a computer. In one embodiment, a simulation test-case is executed and one or more memory locations in the simulated memory are identified as eligible to contain valid data. Subsequent to commencement of the simulated memory walking sequence, it is determined whether an identified memory location is within a specified number of memory locations after a memory location to be processed by simulated hardware during the simulated memory walking sequence. If an identified memory location is within the specified number, the simulated hardware is allowed to process the memory location. If an identified memory location is not within the specified number, the simulated hardware is advanced to a subsequent memory location and is allowed to process the subsequent memory location.

摘要翻译： 本发明的实施例提供了一种用于在由计算机执行的模拟期间加速模拟存储器行走序列的系统，方法和程序产品。 在一个实施例中，执行模拟测试情况，并且模拟存储器中的一个或多个存储器位置被识别为包含有效数据的资格。 在模拟存储器步行序列开始之后，在模拟的存储器行走序列期间，在被模拟硬件处理的存储器位置之后，确定所识别的存储器位置是否在指定数量的存储器位置内。 如果识别的存储器位置在指定的数量内，则允许模拟硬件处理存储器位置。 如果识别的存储器位置不在指定的数量内，则模拟的硬件被提前到后续存储器位置，并被允许处理随后的存储器位置。