DETERMINING THE SPECTRAL ENERGY CONTENT OF A DATA BUS
    1.
    发明申请
    DETERMINING THE SPECTRAL ENERGY CONTENT OF A DATA BUS 有权
    确定数据总线的光谱能量含量

    公开(公告)号:US20150003506A1

    公开(公告)日:2015-01-01

    申请号:US13931721

    申请日:2013-06-28

    IPC分类号: H04B3/46

    CPC分类号: H04B3/46 H04L43/0823

    摘要: Techniques for determining the spectral content of a data bus are described herein. An example of a device in accordance with the present techniques includes a data bus comprising a plurality of signal lines, a first phasor generator, and a second phasor generator. The first phasor generator obtains a first pulse sample based on the data to be transmitted over the data bus and generates a first phasor. The second phasor generator to obtain a second pulse sample based on the data to be transmitted over the data bus and generates a second phasor. The sum of the first phasor and the second phasor indicate, at least in part, the spectral content of the data to be transmitted over the data bus.

    摘要翻译: 本文描述了用于确定数据总线的频谱内容的技术。 根据本技术的装置的示例包括包括多条信号线的数据总线,第一相量发生器和第二相量发生器。 第一相量发生器基于要通过数据总线发送的数据获得第一脉冲采样并产生第一相量。 第二相量发生器,用于基于要通过数据总线发送的数据获得第二脉冲采样并产生第二相量。 第一相量和第二相量的总和至少部分地表示要通过数据总线发送的数据的频谱内容。

    Clocking architecture using a bi-directional reference clock
    3.
    发明申请
    Clocking architecture using a bi-directional reference clock 有权
    使用双向参考时钟的时钟架构

    公开(公告)号:US20070091712A1

    公开(公告)日:2007-04-26

    申请号:US11260019

    申请日:2005-10-26

    IPC分类号: G11C8/00

    CPC分类号: G06F1/04 G06F1/10

    摘要: Embodiments of the invention are generally directed to systems, methods, and apparatuses for a clocking architecture using a bidirectional clock. In an embodiment, a chip includes a bidirectional clock port capable of being statically configured to receive or to transmit a reference clock. In one embodiment, the chip includes a first port to receive data and a second port, wherein the chip repeats at least a portion of the data that it receives on the first port to a transmitter at the second port. Other embodiments are described and claimed.

    摘要翻译: 本发明的实施例一般涉及使用双向时钟的时钟架构的系统,方法和装置。 在一个实施例中,芯片包括能够静态配置为接收或传输参考时钟的双向时钟端口。 在一个实施例中,芯片包括用于接收数据的第一端口和第二端口,其中芯片将其在第一端口上接收的数据的至少一部分重复到第二端口处的发送器。 描述和要求保护其他实施例。

    Clocking architecture using a bidirectional clock port
    4.
    发明授权
    Clocking architecture using a bidirectional clock port 有权
    使用双向时钟端口的时钟架构

    公开(公告)号:US07555670B2

    公开(公告)日:2009-06-30

    申请号:US11260019

    申请日:2005-10-26

    IPC分类号: G06F1/04 G11C8/00

    CPC分类号: G06F1/04 G06F1/10

    摘要: Embodiments of the invention are generally directed to systems, methods, and apparatuses for a clocking architecture using a bidirectional clock. In an embodiment, a chip includes a bidirectional clock port capable of being statically configured to receive or to transmit a reference clock. In one embodiment, the chip includes a first port to receive data and a second port, wherein the chip repeats at least a portion of the data that it receives on the first port to a transmitter at the second port. Other embodiments are described and claimed.

    摘要翻译: 本发明的实施例一般涉及使用双向时钟的时钟架构的系统,方法和装置。 在一个实施例中,芯片包括能够静态配置为接收或传输参考时钟的双向时钟端口。 在一个实施例中,芯片包括用于接收数据的第一端口和第二端口,其中芯片将其在第一端口上接收的数据的至少一部分重复到第二端口处的发送器。 描述和要求保护其他实施例。

    Dummy metal filling
    5.
    发明申请
    Dummy metal filling 审中-公开
    虚拟金属填充

    公开(公告)号:US20050001708A1

    公开(公告)日:2005-01-06

    申请号:US10602095

    申请日:2003-06-23

    摘要: Some embodiments provide an integrated inductor, and one or more electrically isolated metallic units disposed proximate to the inductor. The inductor and the one or more metallic units satisfy a metal density rule, and substantially no current is to flow within one or more of the one or more metallic units during operation of the inductor.

    摘要翻译: 一些实施例提供集成电感器以及靠近电感器设置的一个或多个电隔离金属单元。 电感器和一个或多个金属单元满足金属密度规则,并且在电感器的操作期间,一个或多个金属单元中的一个或多个内部基本上不会流过电流。