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公开(公告)号：US20240171067A1
公开(公告)日：2024-05-23
申请号：US18379264
申请日：2023-10-12
发明人： Zhongwang Yang , Xueliang Chang , Mingjie Shan
CPC分类号： H02M1/385 , H02M3/33592
摘要： An integrated circuit and a converter having the same are provided. The converter further includes a first switch, and the integrated circuit includes a second switch and a sampling processing circuit. The control signals of the first and second switches are complementary, and the control signal of the second switch has a dead time. The sampling processing circuit is for sampling the voltage on the second switch to obtain a duration of the dead time and generating the digital signal according to the duration of the dead time. The digital signal is used to adjust the duration of the dead time.
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公开(公告)号：US20240171066A1
公开(公告)日：2024-05-23
申请号：US18380115
申请日：2023-10-13
发明人： Zhongwang Yang , Xueliang Chang , Mingjie Shan
CPC分类号： H02M1/38 , H02M1/0012 , H02M1/0054 , H02M3/33573 , H02M3/33592
摘要： A deadtime regulation device and a converter having the same are provided. The converter further includes a first switch, the deadtime regulation device includes a communication bus, an integrated circuit and a controller, and the integrated circuit includes a second switch, a sampling processing circuit and a bus control circuit. The control signals of the first and second switches are complementary, and the control signal of the second switch has a dead time. The sampling processing circuit is for sampling the voltage on the second switch to obtain a duration of the dead time and generating the digital signal accordingly. The controller receives the digital signal from the bus control circuit through the communication bus and adjusts the duration of the dead time according to the received digital signal. The controller performs alignment of the communication timing sequence of the communication bus before transmitting the digital signal.
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