公开(公告)号：US20070258635A1

公开(公告)日：2007-11-08

申请号：US11745905

申请日：2007-05-08

申请人： Do-Young Kim ,  Dong-Hoon Chung

发明人： Do-Young Kim ,  Dong-Hoon Chung

IPC分类号： G06K9/00

CPC分类号： G06K9/74 ,  G06T7/0004 ,  G06T2207/30148

摘要： In an embodiment, a mask inspection apparatus for detecting defects in a semiconductor pattern on a mask includes optics for combining light transmitted through or reflected from the mask with a reference beam. The two light beams are transmitted through a second-order non-linear optical system. Mask defects affect the transmitted/reflected light and may be detected by analyzing the transmitted light intensity. The second-order non-linear optical system amplifies selected elements of the combined beam, thus improving detection.

摘要翻译： 在一个实施例中，用于检测掩模上的半导体图案中的缺陷的掩模检查装置包括用于将通过掩模或从掩模反射的光与参考光束组合的光学器件。 两个光束通过二阶非线性光学系统传输。 掩模缺陷影响透射/反射光，可以通过分析透射光强度来检测。 二阶非线性光学系统放大组合光束的选定元素，从而改善检测。

公开(公告)号：US20070164960A1

公开(公告)日：2007-07-19

申请号：US11517223

申请日：2006-09-07

申请人： Jong-Ho Son ,  Dong-Hoon Chung ,  Sung-Hwan Hong ,  Myeong-Ha Kye ,  Il-Kook Huh

发明人： Jong-Ho Son ,  Dong-Hoon Chung ,  Sung-Hwan Hong ,  Myeong-Ha Kye ,  Il-Kook Huh

IPC分类号： G09G3/36

CPC分类号： G02F1/13624 ,  G02F1/136286 ,  G09G3/3659 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2300/0434

摘要： An array substrate includes a base substrate and a plurality of pixels on the base substrate. Each pixel includes a data line, first and second gate lines, first to third switching devices, and first and second pixel electrodes. The first and second gate lines cross the data line, and the second gate line is spaced apart from the first gate line. The first switching device is electrically connected to an adjacent gate line corresponding to an adjacent pixel. The second switching device is electrically connected to the data line and the first gate line. The third switching device is electrically connected to the data line and the second gate line. The first pixel electrode is electrically connected to the first and second switching devices, and the second pixel electrode is electrically connected to the first and third switching devices. The second pixel electrode is spaced apart from the first pixel electrode.

摘要翻译： 阵列基板包括基底基板和基底基板上的多个像素。 每个像素包括数据线，第一和第二栅极线，第一至第三开关器件以及第一和第二像素电极。 第一和第二栅极线与数据线交叉，第二栅极线与第一栅极线间隔开。 第一开关器件电连接到对应于相邻像素的相邻栅极线。 第二开关器件电连接到数据线和第一栅极线。 第三开关器件电连接到数据线和第二栅极线。 第一像素电极电连接到第一和第二开关器件，第二像素电极电连接到第一和第三开关器件。 第二像素电极与第一像素电极间隔开。

公开(公告)号：US07859502B2

公开(公告)日：2010-12-28

申请号：US11517223

申请日：2006-09-07

申请人： Jong-Ho Son ,  Dong-Hoon Chung ,  Sung-Hwan Hong ,  Myeong-Ha Kye ,  Il-Kook Huh

发明人： Jong-Ho Son ,  Dong-Hoon Chung ,  Sung-Hwan Hong ,  Myeong-Ha Kye ,  Il-Kook Huh

IPC分类号： G09G3/36

CPC分类号： G02F1/13624 ,  G02F1/136286 ,  G09G3/3659 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2300/0434

摘要： An array substrate includes a base substrate and a plurality of pixels on the base substrate. Each pixel includes a data line, first and second gate lines, first to third switching devices, and first and second pixel electrodes. The first and second gate lines cross the data line, and the second gate line is spaced apart from the first gate line. The first switching device is electrically connected to an adjacent gate line corresponding to an adjacent pixel. The second switching device is electrically connected to the data line and the first gate line. The third switching device is electrically connected to the data line and the second gate line. The first pixel electrode is electrically connected to the first and second switching devices, and the second pixel electrode is electrically connected to the first and third switching devices. The second pixel electrode is spaced apart from the first pixel electrode.

摘要翻译： 阵列基板包括基底基板和基底基板上的多个像素。 每个像素包括数据线，第一和第二栅极线，第一至第三开关器件以及第一和第二像素电极。 第一和第二栅极线与数据线交叉，第二栅极线与第一栅极线间隔开。 第一开关器件电连接到对应于相邻像素的相邻栅极线。 第二开关器件电连接到数据线和第一栅极线。 第三开关器件电连接到数据线和第二栅极线。 第一像素电极电连接到第一和第二开关器件，第二像素电极电连接到第一和第三开关器件。 第二像素电极与第一像素电极间隔开。

公开(公告)号：US07847893B2

公开(公告)日：2010-12-07

申请号：US11620870

申请日：2007-01-08

申请人： Hee-Wook Do ,  Yoon-Sung Um ,  Dong-Hoon Chung ,  Seung-Hoo Yoo ,  Sung-Hwan Hong ,  Kang-Woo Kim

发明人： Hee-Wook Do ,  Yoon-Sung Um ,  Dong-Hoon Chung ,  Seung-Hoo Yoo ,  Sung-Hwan Hong ,  Kang-Woo Kim

IPC分类号： G02F1/1335

CPC分类号： G02F1/133553 ,  G02F1/133526

摘要： A display device includes a gate line and a data line aligned on a substrate, wherein the gate line and the data line cross each other to define a pixel area on the substrate, a gate electrode branching from the gate line, a source electrode branching from the data line on the gate electrode, a drain electrode spaced apart from the source electrode, a reflective electrode extending from the drain electrode, wherein the reflective electrode is formed in the pixel area, and an insulating layer pattern formed on the reflective electrode, wherein a protrusion pattern is provided at a surface of the insulating layer pattern.

摘要翻译： 显示装置包括栅极线和在衬底上对准的数据线，其中栅极线和数据线彼此交叉以限定衬底上的像素区域，从栅极线分支的栅电极，从 栅电极上的数据线，与源电极间隔开的漏电极，从漏电极延伸的反射电极，其中反射电极形成在像素区域中，以及形成在反射电极上的绝缘层图案，其中 在绝缘层图案的表面设置突起图案。

公开(公告)号：US20070064186A1

公开(公告)日：2007-03-22

申请号：US11491232

申请日：2006-07-21

申请人： Jong-Ho Son ,  Sik-Young Jo ,  Dong-Hoon Chung

发明人： Jong-Ho Son ,  Sik-Young Jo ,  Dong-Hoon Chung

IPC分类号： G02F1/1337 ,  G02F1/1343

CPC分类号： G02F1/1339 ,  G02F1/133514 ,  G02F1/13394 ,  G02F2001/133388

摘要： Liquid crystal displays and fabrication methods thereof are provided. The liquid crystal display includes first substrate and second substrate facing the first substrate, and liquid crystal layer interposed therebetween. The first substrate includes a peripheral part spacer of which a surface includes a transparent conductive material, the peripheral part spacer being connected to a common voltage connector of the second substrate. A common voltage is applied to the first substrate through the common voltage connector and the peripheral part spacer. The peripheral part spacer is formed in the same process step with a display part spacer. To provide the peripheral part spacer with conductivity, the surface of the peripheral part spacer is covered with a transparent conductive material in the same process step in which the common electrode is formed on the first substrate. Accordingly, the peripheral part spacer configured to apply a common voltage to a common electrode can be formed without additional processing.

摘要翻译： 提供了液晶显示器及其制造方法。 液晶显示器包括面向第一基板的第一基板和第二基板，以及夹在其间的液晶层。 第一基板包括外围部分间隔件，其外表面包括透明导电材料，外围部分间隔件连接到第二基板的公共电压连接器。 公共电压通过公共电压连接器和外围部分间隔件施加到第一基板。 外围部分间隔件与显示部件间隔件在相同的工艺步骤中形成。 为了使周边部分间隔物具有导电性，在与第一基板上形成公共电极的相同工艺步骤中，外围部分间隔物的表面被透明导电材料覆盖。 因此，可以在不进行附加处理的情况下形成将公共电压施加到公共电极的外围部分间隔件。

公开(公告)号：US20060126004A1

公开(公告)日：2006-06-15

申请号：US11300320

申请日：2005-12-13

申请人： Hyun-Wuk Kim ,  Jun-Woo Lee ,  Dong-Hoon Chung ,  Yoon-Sung Um ,  Jae-Jin Lyu ,  Chang-Hun Lee

发明人： Hyun-Wuk Kim ,  Jun-Woo Lee ,  Dong-Hoon Chung ,  Yoon-Sung Um ,  Jae-Jin Lyu ,  Chang-Hun Lee

IPC分类号： G02F1/13

CPC分类号： G02F1/136259

摘要： A method of repairing a thin film transistor array panel is provided. The thin film transistor array panel includes a gate line, a data line intersecting the gate line, a thin film transistor connected to the gate line and the data line and having a drain electrode, a pixel electrode including at least one first subpixel electrode connected to the drain electrode of the thin film transistor and a second subpixel electrode capacitively coupled to the at least one first subpixel electrode. The repairing method according to an embodiment of the present invention includes: disconnecting at least one of the second subpixel electrode and the at least one first subpixel electrode from the thin film transistor.

摘要翻译： 提供修复薄膜晶体管阵列面板的方法。 薄膜晶体管阵列面板包括栅极线，与栅极线相交的数据线，连接到栅极线和数据线的薄膜晶体管，并具有漏极，像素电极，包括至少一个第一子像素电极，其连接到 所述薄膜晶体管的漏电极和与所述至少一个第一子像素电极电容耦合的第二子像素电极。 根据本发明的实施例的修复方法包括：从薄膜晶体管断开第二子像素电极和至少一个第一子像素电极中的至少一个。

公开(公告)号：US20060028589A1

公开(公告)日：2006-02-09

申请号：US11195779

申请日：2005-08-03

申请人： Yoon-Sung Um ,  Jong-Ho Son ,  Dong-Hoon Chung ,  Jun-Woo Lee ,  Yong-Hwan Shin ,  Jae-Jin Lyu ,  Hak-Sun Chang ,  Hyun-Wuk Kim ,  Chang-Hun Lee

发明人： Yoon-Sung Um ,  Jong-Ho Son ,  Dong-Hoon Chung ,  Jun-Woo Lee ,  Yong-Hwan Shin ,  Jae-Jin Lyu ,  Hak-Sun Chang ,  Hyun-Wuk Kim ,  Chang-Hun Lee

IPC分类号： G02F1/133

CPC分类号： G02F1/134336 ,  G02F1/136213 ,  G02F2201/52

摘要： The invention provides a LCD including an insulating substrate; a plurality of first signal lines formed on the insulating substrate; a plurality of second signal lines crossing and insulated from the first signal lines; a plurality of thin film transistors (TFT) coupled with the first and second signal lines; and a plurality of pixels including a plurality of first sub-pixel electrodes coupled with the TFTs and a plurality of second sub-pixel electrodes capacitively coupled with the first sub-pixel electrodes, wherein the pixels include a red (R) pixel, a green (G) pixel, and a blue (B) pixel and a voltage ratio or an area ratio of the second sub-pixel electrode with respect to the first sub-pixel electrode is different among the R, G, and B pixels to improve a brightness ratio of R, G, and B components at a lateral position.

摘要翻译： 本发明提供一种包括绝缘基板的LCD; 形成在所述绝缘基板上的多个第一信号线; 与第一信号线交叉并绝缘的多个第二信号线; 与第一和第二信号线耦合的多个薄膜晶体管（TFT）; 以及包括与TFT耦合的多个第一子像素电极和与第一子像素电极电容耦合的多个第二子像素电极的多个像素，其中像素包括红色（R）像素，绿色 （G）像素和蓝色（B）像素，并且第二子像素电极相对于第一子像素电极的电压比率或面积比在R，G和B像素之间是不同的，以改善 亮度比R，G和B分量在横向位置。

公开(公告)号：US06664650B2

公开(公告)日：2003-12-16

申请号：US09790587

申请日：2001-02-23

申请人： Dong-Hoon Chung ,  Jae-Hwan Kim

发明人： Dong-Hoon Chung ,  Jae-Hwan Kim

IPC分类号： H01L23544

CPC分类号： H01L23/544 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

摘要： A method for forming alignment keys on the scribe line areas of a semiconductor wafer. An etch blocking layer is used to reduce the depth of the channels forming the alignment key. One of the layers of material deposited on the semiconductor wafer to form integrated circuit devices on the wafer may be used as the etch blocking layer. A portion of this layer of material may be left intact on the scribe line areas during the manufacturing process. The subsequently deposited layers have an etch selectivity with respect to the etch blocking layer and the subsequently deposited layers are etched down to the etch blocking layer to form the alignment keys.

摘要翻译： 一种用于在半导体晶片的划线区域上形成对准键的方法。 蚀刻阻挡层用于减小形成对准键的通道的深度。 沉积在半导体晶片上以在晶片上形成集成电路器件的材料层之一可以用作蚀刻阻挡层。 在制造过程中，该层材料的一部分可以在划线区域保持完整。 随后沉积的层相对于蚀刻阻挡层具有蚀刻选择性，并且随后沉积的层被蚀刻到蚀刻阻挡层以形成对准键。

公开(公告)号：US07646465B2

公开(公告)日：2010-01-12

申请号：US11491232

申请日：2006-07-21

申请人： Jong-Ho Son ,  Sik-Young Jo ,  Dong-Hoon Chung

发明人： Jong-Ho Son ,  Sik-Young Jo ,  Dong-Hoon Chung

IPC分类号： G02F1/1339 ,  G02F1/1335

CPC分类号： G02F1/1339 ,  G02F1/133514 ,  G02F1/13394 ,  G02F2001/133388

摘要： Liquid crystal displays and fabrication methods thereof are provided. The liquid crystal display includes first substrate and second substrate facing the first substrate, and liquid crystal layer interposed therebetween. The first substrate includes a peripheral part spacer of which a surface includes a transparent conductive material, the peripheral part spacer being connected to a common voltage connector of the second substrate. A common voltage is applied to the first substrate through the common voltage connector and the peripheral part spacer. The peripheral part spacer is formed in the same process step with a display part spacer. To provide the peripheral part spacer with conductivity, the surface of the peripheral part spacer is covered with a transparent conductive material in the same process step in which the common electrode is formed on the first substrate. Accordingly, the peripheral part spacer configured to apply a common voltage to a common electrode can be formed without additional processing.

摘要翻译： 提供了液晶显示器及其制造方法。 液晶显示器包括面向第一基板的第一基板和第二基板，以及夹在其间的液晶层。 第一基板包括外围部分间隔件，其外表面包括透明导电材料，外围部分间隔件连接到第二基板的公共电压连接器。 公共电压通过公共电压连接器和外围部分间隔件施加到第一基板。 外围部分间隔件与显示部件间隔件在相同的工艺步骤中形成。 为了使周边部分间隔物具有导电性，在与第一基板上形成公共电极的相同工艺步骤中，外围部分间隔物的表面被透明导电材料覆盖。 因此，可以在不进行附加处理的情况下形成将公共电压施加到公共电极的外围部分间隔件。

公开(公告)号：US07335449B2

公开(公告)日：2008-02-26

申请号：US10870442

申请日：2004-06-18

申请人： Sung-Hyuck Kim ,  In-Kyun Shin ,  Dong-Hoon Chung

发明人： Sung-Hyuck Kim ,  In-Kyun Shin ,  Dong-Hoon Chung

IPC分类号： G03F1/00 ,  G03F1/08

CPC分类号： G03F1/36

摘要： A mask and a method of forming the mask obviate optical proximity effects. The mask includes a light-shielding layer on a transparent substrate. The light-shielding layer is patterned to form a main pattern and a phantom pattern. The main and phantom patterns each have a light shielding portion and a light-transmitting portion. The pitch of the features constituting the phantom pattern is identical to the pitch of the features constituting the main pattern. The shape of the light-transmitting features of the phantom pattern region is identical to the shape of the light-transmitting features of the main pattern region.

摘要翻译： 掩模和形成掩模的方法消除了光学邻近效应。 掩模在透明基板上包括遮光层。 图案化遮光层以形成主图案和幻影图案。 主要和幻影图案都具有遮光部分和透光部分。 构成幻影图案的特征的间距与构成主图案的特征的间距相同。 幻影图案区域的透光特征的形状与主图案区域的透光特征的形状相同。