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1.发明授权Adjusting access times to memory cells based on characterized word-line delay and gate delay 有权根据特征字延迟和门延迟调整存储单元的访问时间公开(公告)号：US08787099B2
公开(公告)日：2014-07-22
申请号：US13527743
申请日：2012-06-20
申请人： Donald Albert Evans , Rasoju Veerabadra Chary , Bijan Kumar Ghosh , Richard John Stephani , Christopher David Sonnek
发明人： Donald Albert Evans , Rasoju Veerabadra Chary , Bijan Kumar Ghosh , Richard John Stephani , Christopher David Sonnek
IPC分类号： G11C7/00
CPC分类号： G11C8/08 , G11C7/04 , G11C8/18 , G11C11/418
摘要： A memory tracking circuit activates a reset signal that resets a word-line pulse generator to switch the memory from an access state to a recess state. Activation is based on (i) a signal received at the far end of a tracking row after a propagation delay and (ii) a signal applied to a transistor-based gate delay. If the memory is in a fast PVT condition such that the gate delay is of less duration than, or substantially equal to, the propagation delay, then a slow-down circuit delays activation of the reset signal to allow sufficient access margin. The delay in the latter case is less than that in the former case. If the memory is in a slow PVT condition such that the gate delay is longer than the propagation delay, then the slow-down circuit does not delay activation of the reset signal to prevent excess access margin.
摘要翻译： 存储器跟踪电路激活复位信号，其复位字线脉冲发生器以将存储器从访问状态切换到凹陷状态。 激活基于（i）在传播延迟之后在跟踪行的远端处接收到的信号，以及（ii）施加到基于晶体管的门延迟的信号。 如果存储器处于快速PVT状态，使得门延迟的持续时间小于或基本上等于传播延迟，则减速电路延迟复位信号的激活以允许足够的存取余量。 后一种情况的延误小于前一种情况。 如果存储器处于缓慢的PVT条件，使得门延迟比传播延迟更长，则减速电路不延迟复位信号的激活以防止多余的存取余量。
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2.发明申请ADJUSTING ACCESS TIMES TO MEMORY CELLS BASED ON CHARACTERIZED WORD-LINE DELAY AND GATE DELAY 有权基于特征字延时和门延迟调整存储时间的访问时间公开(公告)号：US20130343139A1
公开(公告)日：2013-12-26
申请号：US13527743
申请日：2012-06-20
申请人： Donald Albert Evans , Rasoju Veerabadra Chary , Bijan Kumar Ghosh , Richard John Stephani , Christopher David Sonnek
发明人： Donald Albert Evans , Rasoju Veerabadra Chary , Bijan Kumar Ghosh , Richard John Stephani , Christopher David Sonnek
IPC分类号： G11C7/22
CPC分类号： G11C8/08 , G11C7/04 , G11C8/18 , G11C11/418
摘要： A memory tracking circuit activates a reset signal that resets a word-line pulse generator to switch the memory from an access state to a recess state. Activation is based on (i) a signal received at the far end of a tracking row after a propagation delay and (ii) a signal applied to a transistor-based gate delay. If the memory is in a fast PVT condition such that the gate delay is of less duration than, or substantially equal to, the propagation delay, then a slow-down circuit delays activation of the reset signal to allow sufficient access margin. The delay in the latter case is less than that in the former case. If the memory is in a slow PVT condition such that the gate delay is longer than the propagation delay, then the slow-down circuit does not delay activation of the reset signal to prevent excess access margin.
摘要翻译： 存储器跟踪电路激活复位信号，其复位字线脉冲发生器以将存储器从访问状态切换到凹陷状态。 激活基于（i）在传播延迟之后在跟踪行的远端处接收到的信号，以及（ii）施加到基于晶体管的门延迟的信号。 如果存储器处于快速PVT状态，使得门延迟的持续时间小于或基本上等于传播延迟，则减速电路延迟复位信号的激活以允许足够的存取余量。 后一种情况的延误小于前一种情况。 如果存储器处于缓慢的PVT条件，使得门延迟比传播延迟更长，则减速电路不延迟复位信号的激活以防止多余的存取余量。
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