APPARATUS AND METHOD FOR RECEIVING LIGHT USING MULTIPLE LIGHT RECEIVING SENSORS
    1.
    发明申请
    APPARATUS AND METHOD FOR RECEIVING LIGHT USING MULTIPLE LIGHT RECEIVING SENSORS 审中-公开
    使用多光接收传感器接收光的装置和方法

    公开(公告)号:US20120170947A1

    公开(公告)日:2012-07-05

    申请号:US13225704

    申请日:2011-09-06

    IPC分类号: H04B10/06

    CPC分类号: H04B10/116

    摘要: In an apparatus and method for receiving light using multiple light receiving sensors, a light receiving apparatus includes a light receiving unit comprising multiple light receiving sensors to receive an optical signal; an analyzing unit to extract a highlighted area; a light receiving controlling unit to activate a first light receiving sensor corresponding to the highlighted area, and to determine the first light receiving sensor to be a part of a first sensor group; and a data processing unit to demodulate an optical signal received by the first sensor group into data. A method for receiving an optical signal including extracting a highlighted area; activating a light receiving sensor corresponding to the highlighted area; receiving light through the first light receiving sensor; grouping the first light receiving sensor into a first sensor group; and demodulating an optical signal received by the first sensor group into data.

    摘要翻译: 在使用多个光接收传感器接收光的装置和方法中,光接收装置包括光接收单元,该光接收单元包括用于接收光信号的多个光接收传感器; 提取突出显示区域的分析单元; 光接收控制单元,用于激活对应于所述突出显示区域的第一光接收传感器,以及确定所述第一光接收传感器是第一传感器组的一部分; 以及数据处理单元,用于将由第一传感器组接收的光信号解调为数据。 一种用于接收光信号的方法,包括提取突出显示的区域; 激活对应于突出显示区域的光接收传感器; 通过第一光接收传感器接收光; 将第一光接收传感器分组成第一传感器组; 以及将由所述第一传感器组接收的光信号解调为数据。

    Semiconductor Device Having Saddle Fin Transistor and Method for Fabricating the Same
    2.
    发明申请
    Semiconductor Device Having Saddle Fin Transistor and Method for Fabricating the Same 有权
    具有鞍鳍晶体管的半导体器件及其制造方法

    公开(公告)号:US20100163976A1

    公开(公告)日:2010-07-01

    申请号:US12494567

    申请日:2009-06-30

    IPC分类号: H01L29/78 H01L21/28

    摘要: A method for fabricating a semiconductor device includes forming a pad nitride layer that exposes an isolation region over a cell region of a semiconductor substrate; forming a trench in the isolation region of the semiconductor substrate; forming an isolation layer within the trench; etching an active region of the semiconductor substrate by a certain depth to form a recessed isolation region; etching the isolation layer by a certain depth to form a recessed isolation region; depositing a gate metal layer in the recessed active region and the recessed isolation region to form a gate of a cell transistor; forming an insulation layer over an upper portion of the gate; removing the pad nitride layer to expose a region of the semiconductor substrate to be formed with a contact plug; and depositing a conductive layer in the region of the semiconductor substrate to form a contact plug.

    摘要翻译: 一种制造半导体器件的方法包括形成在半导体衬底的单元区域上暴露隔离区的衬垫氮化物层; 在所述半导体衬底的隔离区域中形成沟槽; 在沟槽内形成隔离层; 蚀刻半导体衬底的有源区一定深度以形成凹入的隔离区; 将隔离层蚀刻一定深度以形成凹入的隔离区域; 在凹入的有源区和凹入的隔离区中沉积栅极金属层以形成单元晶体管的栅极; 在所述浇口的上部上形成绝缘层; 去除衬垫氮化物层以暴露要形成有接触插塞的半导体衬底的区域; 以及在所述半导体衬底的区域中沉积导电层以形成接触插塞。

    METHOD FOR FORMING FINE PATTERNS IN A SEMICONDUCTOR DEVICE
    3.
    发明申请
    METHOD FOR FORMING FINE PATTERNS IN A SEMICONDUCTOR DEVICE 审中-公开
    在半导体器件中形成精细图案的方法

    公开(公告)号:US20100167211A1

    公开(公告)日:2010-07-01

    申请号:US12492720

    申请日:2009-06-26

    IPC分类号: G03F7/20

    摘要: A method for forming fine patterns in a semiconductor device includes forming a first mask layer over an etch target layer, forming a first pattern over the first mask layer, reducing a size of the first pattern, forming a first spacer on a side face of the first pattern, removing the first pattern and patterning the first mask layer using the first spacer as a mask and removing the first spacer. The method also includes oxidating a surface of the patterned first mask layer, forming the first mask layer with reduced size by removing the oxidated portion over the surface of the first mask layer, forming a second spacer on a side wall of the first mask layer and removing the first mask layer, and patterning the etch target layer using the second spacer as a mask.

    摘要翻译: 在半导体器件中形成精细图案的方法包括在蚀刻目标层上形成第一掩模层,在第一掩模层上形成第一图案,减小第一图案的尺寸,在第一掩模层的侧面上形成第一间隔物 第一图案,使用第一间隔件作为掩模去除第一图案和图案化第一掩模层,并移除第一间隔物。 该方法还包括氧化图案化的第一掩模层的表面,通过去除第一掩模层的表面上的氧化部分,在第一掩模层的侧壁上形成第二间隔物,形成具有减小尺寸的第一掩模层,以及 去除第一掩模层,并且使用第二间隔物作为掩模来图案化蚀刻目标层。

    Semiconductor Device and Method of Manufacturing the Same
    4.
    发明申请
    Semiconductor Device and Method of Manufacturing the Same 有权
    半导体器件及其制造方法

    公开(公告)号:US20130093056A1

    公开(公告)日:2013-04-18

    申请号:US13471241

    申请日:2012-05-14

    申请人: Dong Seok KIM

    发明人: Dong Seok KIM

    IPC分类号: H01L27/06 H01L21/768

    摘要: Provided is a semiconductor device. The semiconductor device includes a first insulation layer on a semiconductor substrate, the first insulation layer including a lower metal line, a second insulation layer on the first insulation layer, the second insulation layer including a metal head pattern, a thin film resistor pattern on the metal head pattern, a third insulation layer on the thin film resistor pattern, an upper metal line on the third insulation layer, a first via passing through the first, second, and third insulation layers to connect the lower metal line to the upper metal line, and a second via passing through the third insulation layer and the thin film resistor pattern to connect the metal head pattern to the upper metal line.

    摘要翻译: 提供一种半导体器件。 半导体器件包括半导体衬底上的第一绝缘层,第一绝缘层包括下金属线,第一绝缘层上的第二绝缘层,第二绝缘层包括金属头图案,薄膜电阻器图案 金属头图案,薄膜电阻图案上的第三绝缘层,第三绝缘层上的上金属线,穿过第一,第二和第三绝缘层的第一通孔,以将下金属线连接到上金属线 以及通过第三绝缘层和薄膜电阻图案的第二通孔,以将金属头图案连接到上金属线。

    METHOD OF MANUFACTURING POWER DEVICE
    5.
    发明申请
    METHOD OF MANUFACTURING POWER DEVICE 有权
    制造电源装置的方法

    公开(公告)号:US20130034939A1

    公开(公告)日:2013-02-07

    申请号:US13550920

    申请日:2012-07-17

    IPC分类号: H01L21/336

    摘要: A method of manufacturing a power device includes forming a first drift region on a substrate. A trench is formed by patterning the first drift region. A second drift region is formed by growing n-gallium nitride (GaN) in the trench, and alternately disposing the first drift region and the second drift region. A source electrode contact layer is formed on the second drift region. A source electrode and a gate electrode are formed on the source electrode contact layer. A drain electrode is formed on one side of the substrate which is an opposite side of the first drift region.

    摘要翻译: 制造功率器件的方法包括在衬底上形成第一漂移区。 通过图案化第一漂移区域形成沟槽。 通过在沟槽中生长氮化镓(GaN)并且交替地设置第一漂移区和第二漂移区,形成第二漂移区。 源电极接触层形成在第二漂移区上。 在源电极接触层上形成源电极和栅电极。 在基板的与第一漂移区域相反的一侧上形成漏电极。