公开(公告)号：US20050077605A1

公开(公告)日：2005-04-14

申请号：US10986104

申请日：2004-11-12

申请人： Dylan Yu ,  Gary Guan ,  Jolas Chen ,  Yi-Ming Chang

发明人： Dylan Yu ,  Gary Guan ,  Jolas Chen ,  Yi-Ming Chang

IPC分类号： G02F1/13 ,  H01L21/48 ,  H01L21/50 ,  H01L23/00 ,  H01L23/02 ,  H01L23/28 ,  H01L27/14

CPC分类号： H01L27/14618 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/16195 ,  H01L2924/00014

摘要： A method and structure for a wafer level package is provided, which utilizes a plurality of spacer walls on a semiconductor wafer or a transparent substrate, which has the ability to decide the position of the sealant. As a result, the dimension of a device is decided by the position of the sealant and the spacer walls, therefore, shrinking the distance between the photosensitive zone and the sealant will enhance the gross dies after performing a die sawing process to the whole semiconductor wafer. In addition, the semiconductor process decides the height of the spacer walls so that the yield will be improved due to the fact that a uniformity of the gap, which is between the semiconductor wafer and the transparent substrate, and the width of sealant, will be controlled.

摘要翻译： 提供了一种用于晶片级封装的方法和结构，其利用半导体晶片或透明基板上的多个间隔壁，其具有决定密封剂位置的能力。 结果，装置的尺寸由密封剂和间隔壁的位置决定，因此，在对整个半导体晶片进行模切工艺之后，缩小感光区和密封剂之间的距离将增加总模量 。 此外，半导体工艺决定间隔壁的高度，从而由于半导体晶片和透明基板之间的间隙的均匀性和密封剂的宽度将是 受控。

公开(公告)号：US07087464B2

公开(公告)日：2006-08-08

申请号：US10986104

申请日：2004-11-12

申请人： Dylan Yu ,  Gary Guan ,  Jolas Chen ,  Yi-Ming Chang

发明人： Dylan Yu ,  Gary Guan ,  Jolas Chen ,  Yi-Ming Chang

IPC分类号： H01L21/44

CPC分类号： H01L27/14618 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/16195 ,  H01L2924/00014

摘要： A method and structure for a wafer level package is provided, which utilizes a plurality of spacer walls on a semiconductor wafer or a transparent substrate, which has the ability to decide the position of the sealant. As a result, the dimension of a device is decided by the position of the sealant and the spacer walls, therefore, shrinking the distance between the photosensitive zone and the sealant will enhance the gross dies after performing a die sawing process to the whole semiconductor wafer. In addition, the semiconductor process decides the height of the spacer walls so that the yield will be improved due to the fact that a uniformity of the gap, which is between the semiconductor wafer and the transparent substrate, and the width of sealant, will be controlled.

摘要翻译： 提供了一种用于晶片级封装的方法和结构，其利用半导体晶片或透明基板上的多个间隔壁，其具有决定密封剂位置的能力。 结果，装置的尺寸由密封剂和间隔壁的位置决定，因此，在对整个半导体晶片进行模切工艺之后，缩小感光区和密封剂之间的距离将增加总模量 。 此外，半导体工艺决定间隔壁的高度，从而由于半导体晶片和透明基板之间的间隙的均匀性和密封剂的宽度将是 受控。

公开(公告)号：US20050077603A1

公开(公告)日：2005-04-14

申请号：US10680434

申请日：2003-10-08

申请人： Dylan Yu ,  Gary Guan ,  Jolas Chen ,  Yi-Ming Chang

发明人： Dylan Yu ,  Gary Guan ,  Jolas Chen ,  Yi-Ming Chang

IPC分类号： G02F1/13 ,  H01L21/48 ,  H01L21/50 ,  H01L23/00 ,  H01L23/02 ,  H01L23/28 ,  H01L27/14

CPC分类号： H01L27/14618 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/16195 ,  H01L2924/00014

摘要： A method and structure for a wafer level package is provided, which utilizes a plurality of spacer walls on a semiconductor wafer or a transparent substrate, which has the ability to decide the position of the sealant. As a result, the dimension of a device is decided by the position of the sealant and the spacer walls, therefore, shrinking the distance between the photosensitive zone and the sealant will enhance the gross dies after performing a die sawing process to the whole semiconductor wafer. In addition, the semiconductor process decides the height of the spacer walls so that the yield will be improved due to the fact that a uniformity of the gap, which is between the semiconductor wafer and the transparent substrate, and the width of sealant, will be controlled.