公开(公告)号：US10727139B2

公开(公告)日：2020-07-28

申请号：US16240146

申请日：2019-01-04

申请人： ELPIS TECHNOLOGIES INC.

发明人： Terry Hook ,  Ardasheir Rahman ,  Joshua Rubin ,  Chen Zhang

IPC分类号： H01L21/84 ,  H01L27/12 ,  H01L23/00 ,  H01L23/528 ,  H01L21/768 ,  H01L23/522 ,  H01L27/06 ,  H01L21/8234 ,  H01L21/822 ,  H01L27/088

摘要： Techniques facilitating three-dimensional monolithic vertical field effect transistor logic gates are provided. A logic device can comprise a first vertical transport field effect transistor formed over and adjacent a substrate and a first bonding film deposited over the first vertical transport field effect transistor. The logic device can also comprise a second vertical transport field effect transistor comprising a second bonding film and stacked on the first vertical transport field effect transistor. The second bonding film can affix the second vertical transport field effect transistor to the first vertical transport field effect transistor. In addition, the logic device can comprise one or more monolithic inter-layer vias that extend from first respective portions of the second vertical transport field effect transistor to second respective portions of the first vertical transport field effect transistor and through the first bonding film and the second bonding film.