公开(公告)号：US20160098351A1

公开(公告)日：2016-04-07

申请号：US14352093

申请日：2014-02-28

Applicant: EWHA UNIVERSITY-INDUSTRY COLLABORATION FOUNDATION

Inventor： Hyokyung BAHN ,  Eunji LEE ,  Sam H NCH

IPC: G06F12/08 ,  G06F3/06

CPC classification number: G06F12/0891 ,  G06F3/0619 ,  G06F3/0656 ,  G06F3/0688 ,  G06F12/0246 ,  G06F2212/1032 ,  G06F2212/222 ,  G06F2212/7206 ,  G06F2212/7209

Abstract: An integrated nonvolatile memory control subsystem and method are disclosed. The integrated nonvolatile memory control subsystem includes a nonvolatile buffer cache, a nonvolatile journal area, nonvolatile storage, and an integrated memory control unit. The integrated memory control unit performs a read operation, a write operation, a commit operation and a checkpoint operation on the cache blocks of the nonvolatile buffer cache and the journal blocks of the nonvolatile journal area. The integrated memory control unit sets each of data blocks of the nonvolatile storage as one among valid state, erasable state and invalid state, depending on being cached or not, being journaled or not, and being a clean cache or not, so as to maintain an authentic original up-to-date consistent data within any one of the nonvolatile buffer cache, the nonvolatile journal area and the nonvolatile storage.

Abstract translation: 公开了一种集成的非易失性存储器控制子系统和方法。 集成的非易失性存储器控制子系统包括非易失性缓存高速缓存，非易失性期刊区域，非易失性存储器和集成存储器控制单元。 集成存储器控制单元对非易失性缓存高速缓冲存储器的高速缓存块和非易失性存储区域的日志块执行读操作，写操作，提交操作和检查点操作。 集成存储器控制单元将非易失性存储器的每个数据块设置为有效状态，可擦除状态和无效状态之一，这取决于是否被缓存，并且被记录并且是干净的缓存，以便保持 在非易失性缓存高速缓存，非易失性期刊区域和非易失性存储器中的任何一个内的真实原始的最新一致数据。